Tool/software:
Hi,
Do you have the reference design for KCU116 + AFE7900EVM with following parameters:
Lane rate: 16.22GT/s, 66/64b encoding, application side clock : 245.76MHz ADC/DAC BB: 491.52 Msps
If you do not have it, could you please provide a JESD reference design for any other board that incorporates 64/66 encoding and uses the TI JESD IP core?
Specifically, we are looking for the same IP core you provided to us previously, approximately a week after May 9, 2024, as part of the JESD 8/10 encoding design example.
We have GTH and GTY transceivers.
Regards
Branko