Part Number: AFE7769D
Tool/software:
Hello,
We have a problem with communicating with AFE7769D.
We use the Agilex5(Intel) CPU as a master.
I have some questions like below.
- Power, Clock
According to datasheet, AFE7769D is entered Power On Reset Mode after H/W reset.
To communicate(SPI) with AFE7769D properly, I think that AFE7769D should be reset and initialized properly first.
For the porper initialization, the power condition and reference clock(to AFE7769D) should be satisfied.
By the way, this may seem obvious, but can you explain why the reference clock input to AFE7769D is important?
Because my hardware engineer said that the reference clock doesn't mattter.
The power has been verified to meet the conditions described in Section 7.3 Recommended Operating Conditions.
Should the power conditions described in Section 7.1 Absolute Maximum Ratings also be met? - SPI mode
If you look at the library provided with the SDK, the code inside the SPI Write/Read functions are empty.
(It is described to "/* TBD: User domain */" as a annotation.)
It seems that this is a part that needs to be written by library user(to match their device).//CAFE/Afe77xxDUser/Src/tiAfe77D_baseFunc.c //... TI_AFE_API_COMP uint8_t AFE77DFNP(afeSpiRawWrite)(AFE77D_INST_TYPE afeInst, uint16_t addr, uint8_t data) { afeLogDbg("WRITE: Address: 0x%X, data: 0x%X", addr, data); /* TBD: User domain */ uint8_t status = ftdi_writeReg(addr, data); // AFE77D_FUNC_EXEC(AFE77DFNP(afeWaitMs)(afeInst, 20); if (status == 0) return TI_AFE_RET_EXEC_PASS; else return TI_AFE_RET_EXEC_FAIL; } /** @brief AFE SPI read driver function. @details AFE SPI read driver function and returns the read value as pointer. The contents of this function should be replaced by host SPI driver function. @param afeInst AFE Instance of AFE77D_INST_TYPE type @param addr Address to be read from. @param readVal Pointer return of the value read. @return Returns if the function execution passed or failed. */ TI_AFE_API_COMP uint8_t AFE77DFNP(afeSpiRawRead)(AFE77D_INST_TYPE afeInst, uint16_t addr, uint8_t *readVal) { /* TBD: User domain */ *readVal = 0; // AFE77D_FUNC_EXEC(AFE77DFNP(afeWaitMs)(afeInst, 20); *readVal = ftdi_readReg(0x8000 | addr); afeLogDbg("READ: Address: 0X%X, Read Val: 0X%X", addr, *readVal); return TI_AFE_RET_EXEC_PASS; } //...
In order to set up SPI communication, it seems that you need to change the SPI mode to match the slave, as in the URLs below.
https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1338667/afe031-spi-communication-problem/5126881?tisearch=e2e-sitesearch&keymatch=AFE7%20spi%20lsb#5126881
https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/1281553/afe881h1evm-spi-read-issue-with-afe-board?tisearch=e2e-sitesearch&keymatch=afe%2520spi%2520read#
In the data sheet, it seems that I need to use 1 for writing to slave device and 0 for read from slave device.
In the 8.3.17. Serial Peripheral Interface (SPI) section, it is described as follows.Data is input into the device with the rising edge of SCCLK. Data is output from the device on the falling edge of SCLK. The SPI registers-except for global register GLOBAL0 and GLOBAL1 - are reset by writing a "1" to GLOBAL_SOFT_RESET in the GLOBAL0 register.
What I'm wondering is, is it correct to set SPI mode to 1 when writing from Master and to set SPI mode to 0 when reading from Master?
I am using below spi configurations:
- SCLK: 10MHz
- CS : Active Low
- SPI Mode: 1(write), 0(read)
- Data Order: LSB first
- Master device: Agilex5(Intel)
Regards,
Jung.

