Other Parts Discussed in Thread: AFE7950,
Tool/software:
I'm integrating an AFE7950EVM with an AMD ZCU102 and I'm following the user guide "AFE79xx SPI Bringup Guide With Xilinx FPGAs". I have generated the SPI read/writes for both the LMK and the AFE7950 and am programming both devices from the ZCU102. The LMK seems to be programmed correctly via this method, as the TI IP in the FPGA fabric reports that the system PLL is locking. The issues arise when I try to program the AFE7950.
When I program the AFE7950 with the SPI transactions generated by the Latte software, all operations succeed except for two macro operations:
- macro opcode 0x78, which fails due to a macro error in operand
- macro opcode 0x8d, which fails due to the macro not being allowed in the current state
I don't know if it's specifically a result of these macros failing, but the end result is a series of elastic buffer overflows in the JESD lanes that are disrupting the DDS tone I'm trying to output. Neither of these opcodes are described in the AFE79xx Programming User Guide and I am looking for help determining what they are and how to resolve these issues.
