AFE7950: JESD clock logic clock

Garima Dubey

Prodigy 210 points

Part Number: AFE7950
Other Parts Discussed in Thread: LMX2820

Tool/software:

Hi Team,

Regarding the JESD clock (SYSREF and REFCLK) what is the required acceptable logic for AFE7950.

LVDS, LVPECL or HSDS

Regards,

Garima R.

10 months ago

0 Garima Dubey 10 months ago

Prodigy 210 points

Hi TI team,

Please heed this query on urgent.

Regards,

Garima R.

0 David Chaparro 10 months ago in reply to Garima Dubey

TI__Mastermind 18811 points

Hi,

There is no specific format that is required by the AFE. Instead you can select the standard that meets the input swing and common mode (in the case of SYSREF) requirements outlined in the datasheet.

Regards,

David Chaparro

0 Vikas Kumar40 10 months ago

Intellectual 670 points

Hi
In my design
1: For the sysref, I have given it from the LMX device which is LVDS
2: For the refclk, differential output from the LMX2820 connected. Its not LVDS. Its the output directly from LMX2820 connected to AFE

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AFE7950: JESD clock logic clock