Other Parts Discussed in Thread: LMX2820
Tool/software:
Hi Team,
Regarding the JESD clock (SYSREF and REFCLK) what is the required acceptable logic for AFE7950.
LVDS, LVPECL or HSDS
Regards,
Garima R.
Hi,
There is no specific format that is required by the AFE. Instead you can select the standard that meets the input swing and common mode (in the case of SYSREF) requirements outlined in the datasheet.
Regards,
David Chaparro
Hi
In my design
1: For the sysref, I have given it from the LMX device which is LVDS
2: For the refclk, differential output from the LMX2820 connected. Its not LVDS. Its the output directly from LMX2820 connected to AFE