• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 11 subscribers
  • Views 531 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

GC533x BB format

Gourab Maiti
Prodigy 50 points

Hi,

    Please give me the answers of following questions

    1.   The BB Tx Formatter mode can support three modes Byte, Nibble and Serial. According to the datasheet it is written that Max. clock interface rate/ channel

 

                   Byte Mode --> (clk x 4/4)/N; max 192.31 MSPS total (for all channels)

                   Nibble Mode-->(clk x 4/8)/N; max 125 (Nibble 0) and 96.15 (Nibble 1) MSPS total

                   Serial Mode--> (clk x 4/16)/N; max 48.07 MSPS total

    How these rates are coming? Please give me the calculations regarding this. Also please tell me what is the significance of 4/4, 4/8 and 4/16?


 2. When each DDUC is supporting 12 channels and 8 nibbles format the max IQ rate/ channel is 5.208e6 Mbps (assuming max baseband rate 500 Mbps). So due to PFIR if we consider 80% BW, so it is coming 4.16 MHz BW/ channel. So  whether it means that each DDUC is supporting 4.16*12= 49.92 (>37) MHz of BW?

      3. In High BW mode the max. BW supported by GC5337 is 37 MHz x 4=148 MHz, if we consider all the 4 DDUCs are behaving as DUCs. So in that case if any drawbacks are there?

 

  • 0
    TI__Mastermind 37500 points

    Hello,

    Here are some answers / descriptions:

     

    1) The BB Txinput and Rxoutput interfaces are based on testing that was done on the GC533x/GC6016.  The interface that is supported on the TI EVM is the dual Nibble mode.  Some customers have also used the byte mode.  No customers have used the serial mode.

    If the application requires multiple rates (ie WCDMA and LTE) then the dual Nibble mode would be used.   4, 8, and 16 are normally the number of data phases per IQ element for byte, nibble, and 2 wire serial modes.

    The Baseband interface in DDR1 mode supports upto 500Mbps.  If you want to have 12 channels in each Nibble, then the calculation is based on:

      BBdata rate =  BB IQ rate / channel * 12 channels * 8 data phases / IQ(nibble)

    note: there are additional limitations in that the BB clock has to be an integer multiple / divide of the internal clocks. 

    The BBclock is a DDR implementation, so it is 1/2 the rate of the BBdata

    2.  when the Tx or Rx path related to the DDUC supports 8 or 12 channels, there are 4 channels per CIC/mixer.  The interleaved IQ bus format, needed for 8 or 12 channels is DPDclock / 8.  When you have 2,4,6 channels there are 2 channels per CIC/mixer, and the stream rate is DPDclock/4. 

    The 8 or 12 channel bandwidth is also limited by the DDUC stream rate for Tx input to CFR, and for Rx output from the Rx / distributor.

    3. If all 4 DDUCs are transmitting, the summing depends on the number of channels per DDUC (as explained in note 2).  The bandwidth expansion for HBM (High Bandwidth Mode) is based on the interpolation after the Sum Chain.  Typically there is an Interpolate by 2 after CFR, and another interpolate by 2 before DPD for HBM mode.  The CFR also requires some expansion bandwidth typically 1.5x to 2x.  So the carrier BW is usually 1/4 or 1/5 of the DPD rate to provide the 4 to 6x expansion bandwidth.   The usable bandwidth an an antenna could be:

        Assume the DDUCs are used in the 6 channel mode

        The SumChain rate is DPDclock/4.  The GC5337 typically has a 368.64Mhz clock, the DAC would have a 737.28Mhz clock.

        The CFR needs to have at least 1.25x expansion, we will use 1.5x.  The CFR rate is 368.64/4 = 92.16.  The signal BW would be ~62Mhz

        The postCFR Interp2 raises the IQ rate to 184.32Mhz

        The BUC preDPD Interp2 raises the IQ rate to 368.64Mhz.  The DPD expansion ratio would be 368.64/62 = 5.9

    The other concern with a DPD system in High Bandwidth mode, is the feedback path, typically Complex feedback at 245.76 or real feedback at a higher sample rate would be used. (491.52Mhz).

    Regards,

    Radio Joe