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GC6016 startup package

Other Parts Discussed in Thread: DAC3482

Hi,

few years ago, i used GC5016. It was good chip with good support for designers (documentation, software).

Now I want to try use GC6016, so i am a little disappointed, because, there is very poor documentation and no software for register design.

I do not use EVM, I think, that is better to use chip in own application.

I there any usefull documentation (not only very poor public datasheet) or some design sofware for share?

Thank you

  • Hello,

    The GC6016 is supported through 5 standard configurations which are provided with the GC6016 Digital EVM.  The supported configuations include:

        2 Transmit and 2 Receive streams

        2 carrier LTE20, 30.72Msps IQ rate stream

        4 carrier LTE10, 15.36Msps IQ rate stream

        6 carrier 10.24Msps rate stream

        8 carrier LTe5, 7.68 Msps IQ rate stream, note the number of channels and BW exceed the stream rate, a more narrow PFIR filter can be utilized

        12 carrier 5.12Msps IQ rate stream, note the number of channels and BW exceed the stream rate, a more narrow PFIR filter can be utilized

        There are application notes and training documents for the included blocks in the GC6016 available through contacting the  Application Manager, Jay Shu (jshu@ti.com_   The application notes and training documents are part of the GC6016 EVM kit software package. 

    The EVM has restricted ordering, again contacting your local TI FAE or the Application Manager.

    The configuration tool for the GC6016, is more complex than the GC5016, in that the register programming is provided with the configuration tool, but the initialization sequence is provided as a function of the software to load the register programming.   The GC6016 is not intended for register level programming, it is not supported outside the configuration tool.  A DSP or EMIF equivalent processor has APIs that are used to load the configuration, initialize the device, and provide changed to NCO frequencies, gain,

    An example of the configuration provided:

        DPD clock 307.2e6

        DAC3482 word mode interface Tx, 307.2e6 rate

        Real ADC 6249 family, 204.8e6 sample rate. 

       The Rx block down converter provides 2nd Nyquist zone tuning, real to complex conversion, and decimation filtering.  There are 2 tunable zones for each of 2 Rx ADC  

    inputs.

        DPD, is bypassed; some configurations also have CFR bypassed, use GC5330 if CFR, DPD are needed same configurations are available.

       There are 4 DDUCs, they are configured with the rates listed above from a 76.8Msps Tx stream rate, or 51.2 Msps Rx stream rate

        the(DDUC) has a PFIR, Resampler, CIC, and mixer, for 2,4,6,8, or 12 channels.

       The baseband interface is configured for two Nibbles, so that two different IQ rates are possible for Tx and Rx.  The EVM base Nibble data rate is 491.52Mbps, 245.76Mhz DDR clock. 

     

  • Hello Joe,

    I like GC6016 like a simple device for complex work. It is very hard for me believe, that I must learn with your DSP, buy new development tools and so on.

    it is nice, that your DSP software is able to set registers, but I do not use your DSP. I want use FPGA (or 8bit MCU) to configure GC6016 and so on. There are some sources to learn how to do? Like registers description documents....