TSW40RF80EVM: Synchronization of two ADC32RF80

I am a bit confused by your post, but I think the gist is that you want to synchronize two AFE40RF80 EVMs. For reference you can check out this app note of deterministic latency: www.ti.com/.../sbaa221. You may also reference this training module related to synchronization: training.ti.com/synchronizing-multiple-jesd204b-adcs

As you mentioned, there are a couple of different options for clocking the ADC. The default option is to use the LMX device for the ADC clock; however, this is not necessarily the easiest solution for synchronization as the initial phase of the LMX is not deterministic. If you opt to use the LMK as the clock directly then clock synchronization is a bit easier. Each EVM should have the 10 MHz reference and the delay to each input connector should be the same. The LMK will be locked to 2949.12 MHz and synchronized to the external 10 MHz reference. Both EVMs will be in sync with this approach; however, there is some amount of part to part variation skew between two LMK device outputs that will result in some error. It should be small; I think the spec is less than 40 ps. It is possible to make some fine delay adjustments on the LMK to account for any system variations. This is not straightforward to do on the device EVM GUI but is possible with low level register writes of the LMK.

Another option is to clock the ADC from an external source. In this configuration, you can have a single signal generator source split and drive each EVM clock input. Again, care must be taken to ensure each path is phase matched. This method ensures the clocks are synchronized. There may be some skew due to the switches and EVM board traces, but it should be small.

--RJH