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IWR6843: Minimum DFE Sample Rate

Curtis Belknap
Intellectual 420 points
Part Number: IWR6843

Hello,

I am looking for the minimum sample rate that the IWR6843 digital front end can support.

I cannot find a minimum published value in the datasheet, users guide, or in the SDK documentation.

-- Curtis

  • 0
    TI__Mastermind 40335 points

    HI, Curtis:

    You can find it in the SDK Doxygen Documentation.   

    1) First, go to : file:///C:/ti/mmwave_sdk_03_05_00_04/docs/mmwave_sdk_module_documentation.html

    2) Click on "mmWaveLink Framework" Under "control layer" 

    3) Click on" Sensor" under Modules

    4) Click on "rfSetProfileConfig", and clock on the data structure rlProfileCfg_t

    5) Find on the field "digOutSampleRate", you will see the detail description of ADC sampling rate for different device in different mode.

    file:///C:/ti/mmwave_sdk_03_05_00_04/packages/ti/control/mmwavelink/docs/doxygen/html/structrl_profile_cfg__t.html#ad9b44a0be4e36a6d2a8539363992429b

    Based on this documentation, the minimum ADC rate is 2MHz.

    You can find all the mmwave link layer API in this area. 

    Best,

    Zigang

  • 0 in reply to zigang Yang
    Intellectual 420 points

    Ah, I am working against SDK 3.4.0.3 and this information was not present. I have downloaded the most recent SDK and confirmed that the information is there.

    This raises a few new questions:

    1. Where does this minimum limitation arise from? The high pass filters in the IF signal chain are much lower in frequency than 2[MHz], so it should be reasonable to limit the DFE sample rate to a lower frequency.
    2. The data sheet is very misleading (see below) since it indicates no lower bound for the ADC, will this be updated?

    -- Curtis

  • 0 in reply to Curtis Belknap
    TI__Mastermind 40335 points

    HI, Curtis:

    The minimum ADC rate is limited by how many down-sample stages are there in the RX chain.  I will let the design team know your feedback on datasheet.

    Best,

    Zigang