Good Morning
We are designing a monitoring system including 4 LVDTs. We arranged the following configuration:
- 4 LVDTs which excitations are supplied by only one PGA970 that acts as PGA970 master. (All LVDTs are excited by the same PGA970).
- The 4 secondary windings of the the 4 LVDTs are read by four different PGA970s.
- We connect at P1 and P2 outputs to a current buffer to garantee the correct current supply to the 3 PGA970 slaves.
The following schematic scratch captures the circuit which we would like to design (to simplify the representation we will report only two PGA90s: the top PGA970 is the master and the bottom one is the slave) .
PGA master is responsible to provide the excitation for LVDT1 and LVDT2 and will read read the secondary pair of LVDT1. PGA970 slave is only able to read its LVDT2.
We would like to know if such configuration is supported before ending the design.
Thank you in advance
Best regards