FDC1004: Shield Driver States

Hi Justin,

While waiting for your response, I did a test on my own with the FDC1004EVM. Below is the screen shot of what I see. 

The registers of the FDC1004 are shown. CHA is configured to CIN1, CIN2, CIN3, CIN4 respectively. and all of CHB is configured to be the CAPDAC at with an offset capacitance setting of 0. The waveform on the right is a measurement of the SHLD1 pin on the evaluation module. Repeated measurement is off (bit 8  in FDC_CONF).

From my observation a  single measurement on CIN1 is taken and SHLD1 is activated only when I write to the FDC_CONF reg with bit 8 = 0 and bit 7 = 1. Otherwise, when I am not writing to that register, I am not seeing any signal on my scope connected to SHLD1.

The behavior seems to be a different then what you mentioned. Is there an explanation to what I am seeing? 

Best,

Brian

Hi Justin,

Just to confirm,  is there an internal GND connection when the device is not measuring the channels? When I was probing the shield output, I'm not sure if it is grounded. The signal seems to be low but it seems to be a high impedance signal.

Best,

Brian

Hello Brian, 

Let me double check with the internal team and I will have an answer for you by the end of the day Monday. 

Best, 

Justin Beigel

Hello Brian, 

Sorry for the delay. What is the motivation behind needing to know if it is high impedance or GND? Is there a specific application in mind where it would make a difference for you? 

Thank you, 

Justin Beigel

Hi Justin,

Our application harbors around knowing the electromagnetics of the board therefore, knowing the behavior of the shield that it is driving help us with our design.

Best,

Brian