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AWR2243: Questions about the cascade mode

chao wen
Prodigy 40 points
Part Number: AWR2243
Other Parts Discussed in Thread: AWR2944, , TDA2, AWR1243

Hi,all

I still have some questions about the cascade application as follow

Question1：What is the recommended digital processor for AWR1243P cascade chips？
Question2：AWR1243P+FPGA architecture can be configured with simultaneous transmission and transmission phase shift, how to configure the driver RF program in FPGA chip?  
Question3：Can AWR2243 chip be configured to transmit DDMA mode similar to AWR2944?

Hoping for your reply

BR.

  • 0
    Prodigy 40 points

    Plus

    Question4：AWR1243P：How to configure DDMA mode?
    Question5：On the AWR1243P platform, we modified the BF launch mode and launched the initial phase at the same time. The data collected found that the amplitude of the same target was inconsistent.  How do I find this problem?  

     Thanks!

  • 0
    TI__Genius 13805 points

    Hi Chen,

                       For specific details on 1 please reach out to local TI representative.

    For rest I am listing responses below:

    2) The FPGA on TDA2 (DSP EVM) board implements CSI2 to VIP bridge whose code cannot be altered by user.

    3) and 4)  AWR1243 or AWR2243 are front end devices unlike AWR2944(single chip). This offering is under works and shall be relased shortly.

    5) Can you share more details?

    Regards

  • 0 in reply to Abhed Misra
    TI__Mastermind 37766 points
    Abhed Misra said:
    3) and 4)  AWR1243 or AWR2243 are front end devices unlike AWR2944(single chip). This offering is under works and shall be relased shortly.

    Abhed,

    Will the offering of DDMA on AWR2243 based on mmWave studio (config and get ADC) + Matlab process code?

  • 0 in reply to Chris Meng
    TI__Genius 13805 points

    Hi,

          This will come part of the next SDK release and would be with Host + 2243 topology.

    Regards