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TMP103: TMP103 over tHD;DAT Max

Jamie Tseng
Intellectual 2405 points
Part Number: TMP103
Other Parts Discussed in Thread: TMP102

Hi Team,

When my customer measureing I2C AC Timing at 630k Hz HS Mode, they get data hold time(tHD;DAT) ~= 500ns.

It will over the tHD;DAT Max of TMP103.

Could you help check:

1. Is this timing acceptable and will it not cause any issue?
2. Theoretically, the hold time should be as large as possible. Is it possible to relax the spec to tHD; DAT Max = ∞ ?

Looking forward to your feedback.

Thanks and Best regards,

Jamie

  • 0
    TI__Genius 10070 points

    Hi Jamie,

    Thank you for posting to the Sensing forum. 

    As a target device the TMP103 is only sensitive to minimum hold and setup times, and there is no risk associated with maximum hold time. 

    Additionally, please ensure that the customer is measuring t­HD;DAT from (0.3 x VDD) of the falling edge of SCL to (0.3 x VDD) of the rising edge or (0.7 x VDD) of the falling edge of SDA.

    Figure 39 of the I2C-bus specification:

    Best regards,

    Nicole

  • 0 in reply to Nicole Khoury
    TI__Intellectual 2405 points

    Hi Nicole,

    Thanks for your feedback.

    1. May I know whether the TMP102 has same hold time max criteria as TMP103 ?
    2. The customer want to know if it’s possible to modify data hold time max time in TMP 103 datasheet ? 

    Best regards,

    Jamie

  • 0 in reply to Jamie Tseng
    TI__Genius 10070 points

    Hi Jamie,

    The TMP102 has a minimum hold time of 25 ns and a maximum hold time of 105 ns in high-speed mode. Maximum hold time does not negatively affect our device, however it has been calculated for the maximum frequency shown in section 6.6 of the datasheet.

    Best regards,

    Nicole