Hi supporter;
We calibrate the phase mismatch between 4 cascade chips when TX power backoff=0.
After calibrated, we want to know if there will be phase mismatch when we set TX power backoff≠0.
thanks
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Hi supporter;
We calibrate the phase mismatch between 4 cascade chips when TX power backoff=0.
After calibrated, we want to know if there will be phase mismatch when we set TX power backoff≠0.
thanks
Hello,
Thank you for reaching out to Texas Instruments. Your question is being forwarded to an expert on this topic. Please allow some time for them to get back to you.
Thanks,
-Shareef
Hi,
Phase mismatch should not change, after the power is backed off.
Regards,
Sami
Hi,
I was talking to one of my colleagues regarding your inquiry, and here is what he said:
"If it’s external sensor level calibration done by the Customer then it’s recommended to be done using the same back-off level that they plan to use in the chirps."
Regards,
Sami