AWR6843: The glitch on the GPIO output

JengDa Li

Part Number: AWR6843

Hi all,

It is configured the R4 pin of AWR6843 with following code. But there is a glitch observed on the output of GPIO (as marked in following figure.). Is there anything we missed while configuration ?

Pinmux_Set_OverrideCtrl(SOC_XWR68XX_PINR4_PADBF, PINMUX_OUTEN_RETAIN_HW_CTRL, PINMUX_INPEN_RETAIN_HW_CTRL);

Pinmux_Set_FuncSel(SOC_XWR68XX_PINR4_PADBF, SOC_XWR68XX_PINR4_PADBF_GPIO_31);

GPIO_write(WDI_PIN, 0);

GPIO_setConfig (WDI_PIN, GPIO_CFG_OUTPUT);

GPIO_write(WDI_PIN, 0);

BR,

Morris

over 3 years ago

0 E. Shareef over 3 years ago

TI__Genius 16440 points

Hello Morris,

Your request is being routed to the concerned department. Please allow some time for them to get back to you.

-Shareef

+1 CHETHAN KUMAR Y.B. over 3 years ago in reply to E. Shareef

TI__Mastermind 25835 points

Hello Morris,

There is an errata for this issue please see more details and work around for this issue.

Thanks and regards,

CHETHAN KUMAR Y.B.

0 Jesse Wang over 3 years ago in reply to CHETHAN KUMAR Y.B.

TI__Intellectual 2285 points

Hi Chethan,

But our situation is not the same as the errata says "the glitch happening during 3.3V power up". The glitch we see here is after reset stable, and it happens when the SW is trying to modify the GPIO from input pin to output low. So the RESET will be not applicable to the situation.

My question would be:

1). Is the glitch also a known issue when SW code modifying the GPIO state?

2). Besides Reset, any other suggested solution or workaround?

0 CHETHAN KUMAR Y.B. over 3 years ago in reply to Jesse Wang

TI__Mastermind 25835 points

Hello Jesse,

In the oscilloscope capture power supply was also ramping, Hence above errata applicability is considered.

Glitch is not a known issue when SW code is modifying the GPIO state, however if there are pull ups connected on the line and then it could be possible to get a glitch for example if I/O goes through tri-state and drives low then pull ups on the pin might cause a glitch.

Could you please provide details of which GPIO pins is getting modified from input to output pin? Do you have schematics of the design? Is there any internal/external PU/PDs enabled on this GPIO?

Thanks and regards,

CHETHAN KUMAR Y.B.

0 JengDa Li over 3 years ago in reply to CHETHAN KUMAR Y.B.

Prodigy 110 points

Hi Cethan,

We tried the solution to add a tristate buffer as suggested in the Errata, it works to solve this glitch issue.

BR,

Morris

0 CHETHAN KUMAR Y.B. over 3 years ago in reply to JengDa Li

TI__Mastermind 25835 points

Hi Morris,

Glad to hear it worked for you. Thanks for your confirmation.

Thanks and regards,

CHETHAN KUMAR Y.B.

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AWR6843: The glitch on the GPIO output