• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 32 subscribers
  • Views 363 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AWR2243: Queries regarding SFlash

Vignesh Jeyaraman
Prodigy 185 points
Part Number: AWR2243


Dear TI team,  

We have a custom 2-Chip cascade board with AWR2243P operating in cascade mode. We have an application based on mmwavelink framework for configuring the device and collecting rawdata from our backend board via Ethernet. Because the firmware download takes a larger time, we connected SFLASH to each of the chips. I have a couple of questions related to this.  

I adapted the mmwavelink SFlash example in to the current code, and it works as expected for a single chip. We want to use “image load from SFLASH” in cascade configuration.(AWR2243 bootloader flow document)  

However, if one refers to the section 6.2 table 6.1 in Radar Interface control document, which shows the programming sequence in Cascade mode, the master device needs to be configured using the “AWR_CHAN_CONF_SET_SB” API, before the slave device can be powered on. Can both devices be powered on and the APIs are issued in the correct order. i.e. Steps. 1&6 followed by steps 2-5 and 7-24. ? 

Another question is related to the writing and erasing of SFlash. Currently I have written the firmware to SFLASH via SPI using the mmwavelink SFlash example. (UART is not connected, only SPI and JTAG interfaces are accessible by backend). How can I erase the firmware in the SFLASH. ? Is there an example to erase SFLASH via SPI? 

I hope to hear from you soon. 

Thanks & Regards,

Vignesh

  • 0
    TI__Guru 70050 points

    Hi Vignesh,

    Please find my comment below-

    Vignesh Jeyaraman said:
    Can both devices be powered on and the APIs are issued in the correct order.

    If you cascade multiple AWR devices (2/4 chip) then out of those, one of the AWR device needs to be always Master and remaining other AWR need to be in slave mode. Master device will provide clock, LO and other required signal to slave device.

    In this mechanism, Master device needs to powered up first and configured in Master cascade mode, so now it can provide those clock, LO etc. to slave device.

    So those initial commands can not be sent to master & slave AWR devices together. But later commands except FrameConfig can be sent together to all AWR devices.

    Vignesh Jeyaraman said:
    How can I erase the firmware in the SFLASH. ?

    There is no command to erase the sFlash over SPI. However AWR MSS ROM erases required size of sFlash first when it receives the FW (to flash). 

    In other case if don't want AWR device to load via sFlash but now load FW via SPI to RAM then load only 1st chunk only via SPI mode to AWR then stop. In this case, one first chunk reception AWR ROM will erase the sFlash. And as you don't load full FW over SPI to sFLash so in the next power cycle ROM won't find valid FW/Patch image on sFlash so it won't load it and now you can load valid FW/Patch over SPI directly to RAM.

    Regards,

    Jitendra