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FDC1004: FDC1004:ERR & Gain error

Part Number: FDC1004


Hi TI experts,

     1、About the ERR,the test conditions: after offset calibration,may I ask whether this bias calibration is conducted through CIN open circuit calibration?

     2、How to understand Gain error and Gain drift?Can you give an example of how they affect my measurements?

               

Best wishes.

Jiang

  • Jiang,

    For your first question I will need to check with our test engineers.
    Just so you know, I may not be able to share the answer since our manufacturing and test processes are considered IP.

    The gain error and drift contribute to the overall gain by:

    OUT = IN*(GAIN - GERR + tcG*(TEMP -25))

    Regards,
    John

  • Hi John,

         Okay, no problem,so about this ERR,can I assume it's the one highlighted in the picture? It means that there will be a bias of ±6fF after factory calibration, and then this bias includes the parameter IN in the formula?Or what does the IN parameter contain?

    By the way, can I obtain the capacitance bias of the system by open-circuit measurement? Is this method reliable?Thank you.

    Best wishes.

    Jiang

  • Jiang,

    I made a mistake in my previous reply. The gain error impacts the gain as GAIN*(1 ± GAIN_ERR) where GAIN is the nominal value.
    There will be a ±6fF error in the estimated capacitance after the factory calibration. This error applies to any measurement made over the specified range of ±15pF. 
    It is unlikely you can identify the error by an open-circuit measurement unless you know the precise value of the CINx parasitics on the PCB you are using. 

    Regards,
    John