FDC1004: Layout of a 4-layer board using FDC1004

Samuel Elkin

Part Number: FDC1004

Hello,

I have a concern regarding the layout for a board using the FDC1004. In the Capacitive Sensing: Ins and Outs of Active Shielding app note, this image is shown, which seems to indicate that an additional layer of the PCB acting as a shielding plane eliminates parasitic capacitance:

However, in the design files for the FDC1004EVM, only 2 layers are used, with the bottom layer being split between a ground and shield plane. Because of this, I am unsure if the addition of a shield layer is worth the additional cost of a 4 layer board. And if a 4 layer board is used, what do you recommend doing with the remaining layer?

Thank you,

Sam Elkin

over 3 years ago

+1 John Miller - Sensing over 3 years ago

TI__Mastermind 40295 points

Sam,

The figure is meant to show active shield layer lessens the impact of EMI on the sensor while not introducing more parasitic capacitance as a passive ground plane would.
You could also shield the sensor from EMI with a passive ground plane, but that would introduce more parasitic capacitance: not good for a capacitive sensor.

A two-layer PCB is fine where one layer is the sensor and one layer is the active shield.

Regards,
John

0 Samuel Elkin over 3 years ago in reply to John Miller - Sensing

Prodigy 10 points

That makes sense, thank you John!

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FDC1004: Layout of a 4-layer board using FDC1004