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AWR1843BOOST: Clock configuration issue for QSPI_Urgent

Part Number: AWR1843BOOST

Hello Team,

 I am using AWR1843BOOST EVM, and i have an issue with clock configuration, below is my configuration.

CAN is working, SPI intialization failing when it is free run.

But properly initialized when i put break point.

As per understanding, seems a problem with SPI clock/baud rate.

As per SFLASH MX25V1635F datasheet, device can support 80Mhz.

I would like to run CPU at 200Mhz.

 

Could you please check, and let me know where i did mistake.

I am stuck at same issue from 3days.

BRSHW -> you can ignore.

void BrsHwPllInitPowerOn(void)
{
/*
 * MSS_VCLK and DSPCLK is managed by the Boot ROM and the user is not expected to changes these configurations
 *  MSS_VCLK = 200 Mhz maximum
 */
  /* Enable Access RCM */
  BRSHW_SYS_USER_RCM = 0xADADADAD;

  /* Enable User access */
  BRSHW_SYS_USER_PERIPH =0xFFFFFFFF;

  /* Gate the clock to the peripheral MCAN DCAN QSPI to work with the Clock */
  BRSHW_SYS_CLKGATE = 0x00000038;

  /*
   * Need to configure MCAN- DCAN Clock divider 
   * DCAN : [23:16] BRSHW_CLKDIVCTL0  
   * MCAN : [31:24] BRSHW_CLKDIVCTL0
   * CPU  : [15:8}  CPU
   * 0x00000000  div 1 
   * 0x00000001  div 2
   * 0x00000002  div 3
   * 0x00000001  div 2
   * 0x00000001  div 2
   * 0xFFFFFFFF  div 256
   */
  BRSHW_CLKDIVCTL0 = 0x09090200;

  /*
   * Need to configure QSPI Clock divider 
   */
  BRSHW_CLKDIVCTL2 = 0x00000009;
  /*
   * Need to Route  MCAN- DCAN Clock  --> Choose below 
   * DCAN : [3:0] B  
   * MCAN : [11:8] 
   * 000  VCLK 
   * 001 101 111  RCCLK
   * 100  CPUCLK
   * 110 REFCLK --> don't use it unstable ! 
   */
  /* Select Ref Clock source from PLL for MCAN and DCAN and QSPI --> 600 Mhz */
  BRSHW_CLKSRCSEL0 = 0x00020202;

  /* Same as definition above CPU but for CPU ---> 600Mhz */
  BRSHW_SYS_CLKSRCSEL1 =  0x00000002;  
  
  /* Ungate the Clock */
  BRSHW_SYS_CLKGATE = 0x00000000;
}

Kind regards,

Hari