Hi,
My goal is to get ADC raw data in the pipeline for 1 frame to L3 memory.
To achieve so, i have configured the new set of EDMA channels, which read the data from HWA memory bank[0] and memory bank[1] and transfer it in my buffer. The EDMA channels involved in range proc data transfer from HWA memory bank[2] and memory bank[3] to Radarcube have been chained too, with the new channels to make sure that the pipeline remains intact.
Now the issue that i am facing is about verification, whether the right data has been filled in my L3 buffer or not. When i check in the CCS memory browser, only a set of values in the end of my buffer match the ADC buffer content. Is it happening because the ADC buffer gets overwritten everytime ?
Can we explicitly memset the ADCbuffer to a value let say 1 and verify it with L3 buffer ?
Please suggest any other methods for verification too.
Thank you
