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AWR2944: DP83TC812 migration question

Part Number: AWR2944

Hi Experts

The customer migration DP83TC812 to their program, and find that can't connect with their PC. The ipconfig for PC : 192.168.33.3 and ipconfig for AWR2944 : 192.168.33.8.

Could you help to point out what's the problem, the log for this test as below,:

13:49:07.759] Starting QSPI Bootloader ...

[13:49:07.759] [BOOTLOADER_PROFILE] Boot Media : NOR SPI FLASH

[13:49:08.198] [BOOTLOADER_PROFILE] Boot Media Clock : 80.000 MHz

[13:49:08.198] [BOOTLOADER_PROFILE] Boot Image Size : 438 KB

[13:49:08.208] [BOOTLOADER_PROFILE] Cores present :

[13:49:08.208] r5f0-0

[13:49:08.208] [BOOTLOADER PROFILE] System_init : 693us

[13:49:08.218] [BOOTLOADER PROFILE] Drivers_open : 26us

[13:49:08.218] [BOOTLOADER PROFILE] Board_driversOpen : 2733us

[13:49:08.228] [BOOTLOADER PROFILE] CPU load : 428956us

[13:49:08.238] [BOOTLOADER_PROFILE] SBL Total Time Taken : 432411us

[13:49:08.238]

[13:49:08.238] Image loading done, switching to application ...

[13:49:08.249] INFO: Bootloader_runSelfCpu:217: All done, reseting self ...

[13:49:08.249]

[13:49:08.249] ==========================

[13:49:08.259] CPSW LWIP TCP ECHO SERVER

[13:49:08.259] ==========================

[13:49:08.259] Enet_open: cpsw2g: features: 0x00000002

[13:49:08.259] Enet_open: cpsw2g: errata : 0x00000000

[13:49:08.269] EnetPhy_setNextState: PHY 0: INIT -> FINDING (20 ticks)

[13:49:08.269] EnetPhy_setNextState: PHY 0: FINDING -> FOUND (0 ticks)

 

[13:49:08.279] EnetPhy_bindDriver: PHY 0: OUI:080028 Model:27 Ver:01 <-> 'dp83tc812'

[13:49:08.279] EnetPhy_bindDriver: PHY 0: OUI:080028 Model:27 Ver:01 <-> 'dp83tc812' : OK

[13:49:08.289] EnetPhy_open: PHY 0: open

[13:49:08.289] PHY 0 is alive

[13:49:08.289] Host MAC address-0 : 70:ff:76:1d:ec:f3

[13:49:08.299] [LWIPIF_LWIP] NETIF INIT SUCCESS

[13:49:08.555] [LWIPIF_LWIP] Enet has been started successfully

[13:49:08.558] Enet IF UP Event. Local interface IP:192.168.33.8

[13:49:08.558] Waiting for network UP ...

[13:49:08.558] Dp83tc812_reset: PHY 0: global soft-reset

[13:49:08.558] EnetPhy_setNextState: PHY 0: FOUND -> RESET_WAIT (10 ticks)

[13:49:08.558] Dp83tc812_isResetComplete: PHY 0: global reset is complete

[13:49:08.558] EnetPhy_setNextState: PHY 0: RESET_WAIT -> ENABLE (0 ticks)

[13:49:08.558] EnetPhy_enableState: PHY 0: enable

[13:49:08.598] Dp83tc812_readStraps: PHY 0: Strap register is 0x4260

[13:49:08.598] Dp83tc812_readStraps: PHY 0: Strap: SGMII Mode enabled

[13:49:08.620] Dp83tc812_config: PHY 0: Master Mode enabled

[13:49:08.620] Dp83tc812_resetHw: PHY 0: global hard-reset

[13:49:08.620] Dp83tc812_isResetComplete: PHY 0: global reset is complete

[13:49:08.620] Dp83tc812_chipInit: PHY 0: Applying configuration for DP83TC812 CS2.0 Master

[13:49:08.629] Dp83tc812_reset: PHY 0: global soft-reset

[13:49:08.629] Dp83tc812_isResetComplete: PHY 0: global reset is complete

[13:49:08.649] Dp83tc812_setMiiMode: PHY 0: RGMII Mode enabled

[13:49:08.649] Dp83tc812_configClkShift: PHY 0: RGMII TX Clock Shift enabled

[13:49:08.649] Dp83tc812_configClkShift: PHY 0: RGMII RX Clock Shift enabled

[13:49:08.649] Dp83tc812_configIntr: PHY 0: Enable interrupts

[13:49:08.662] Dp83tc812_setLoopbackCfg: PHY 0: disable loopback

[13:49:08.662]

Dp83tc812_reset: PHY 0: global soft-reset

[13:49:08.669] Dp83tc812_isResetComplete: PHY 0: global reset is complete

[13:49:08.669] EnetPhy_enableState: PHY doesnt support Caps via Register Access. Setting fixed link parameters.

[13:49:08.678] EnetPhy_enableState: PHY 0: req caps: FD1000 HD1000 FD100 HD100 FD10 HD10

[13:49:08.689] EnetPhy_enableState: PHY 0: PHY caps: FD100

[13:49:08.689] EnetPhy_enableState: PHY 0: MAC caps: FD1000 FD100 HD100 FD10 HD10

[13:49:08.699] EnetPhy_enableState: PHY 0: refined caps: FD100

[13:49:08.699] EnetPhy_enableState: PHY 0: PHY is not NWAY-capable

[13:49:08.709] EnetPhy_enableState: PHY 0: falling back to manual mode

[13:49:08.709] EnetPhy_enableState: PHY 0: new link caps: FD100

[13:49:08.719] EnetPhy_enableState: PHY 0: manual setup

[13:49:08.719] EnetPhy_setupManual: PHY 0: requested mode: 100 Mbps full-duplex

[13:49:08.729] EnetPhy_setNextState: PHY 0: ENABLE -> LINK_WAIT (50 ticks)

[13:49:08.729] EnetPhy_setNextState: PHY 0: LINK_WAIT -> LINKED (0 ticks)

[13:49:08.739] Cpsw_handleLinkUp: Port 1: Link up: 100-Mbps Full-Duplex

[13:49:08.739] MAC Port 1: link up

[13:49:08.739] Network Link UP Event

[13:49:08.799] Network is UP ...

[13:49:10.468] 8. 66s : CPU load = 4.93 %

[13:49:16.319] 13. 67s : CPU load = 2.48 %

[13:49:21.318]

Thanks

Bryan