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AWR2243: AWR2243 cascaded CSI2 and LVDS

Part Number: AWR2243

Hi,

We have an AWR2243 cascaded design working with LVDS data transmission at 900mbps per channel.

We would like to evaluate the CSI2 as a data channel, but we were able to run only 2 chips on CSI2 while the other 2 remained on LVDS because of technical reasons of our platform.

My question is: can you tell me if this is possible, if a cascaded design can run 2 chips on LVDS and other 2 on CSI2 since I am not being able to receive any data (I have no configuration errors)?

Ivan

  • Hello Ivan,

    This particular scenario is possible but if you are planning on implementing a system with 2 CSI2 and 2 LVDS, then you will also need to take into account the timing difference that might be caused by implementing different forms of streaming into the host processor. This is because you will need to consider that in an ideal scenario, all the chips need to be time synchronized, but by having different streaming, there will be some time difference which you would have to take care of.

    Regards,
    Saswat Kumar

  • Hi Saswat,

    We already took care that the indeprendent (LVDS) streams can successfully be received. The chips are connected with HW trigger, which is triggered by the master, so there should be any big difference between the time they start streaming.

    The funny thing I saw is when I configured 2 chips for CSI2 and 2 for LVDS, one CSI 2 chip wasnt streaming, but when I configured all 4 for CSI2, the 2 CSI2 chips were streaming (probably the other 2 were as well, but I could not verify that since I had an LVDS receiver there).

    So basically you are telling me that there is no limitation when it comes to streaming of the cascaded platform with different interfaces?

    Regards,

    Ivan

  • Hello Ivan,

    Yes, there is no limitation as long as you are able to handle the timing as well as your host processor is able to handle the continuous streaming of 2 CSI2 and 2 LVDS data at the same time.

    Regards,
    Saswat Kumar