Are there internal electrical connections to the thermal pad on the QFN package? I'm measuring roughly 80MΩ between pin 10 (gnd) and the thermal pad. Is that expected? If so, what is it intended to be connected to?
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Are there internal electrical connections to the thermal pad on the QFN package? I'm measuring roughly 80MΩ between pin 10 (gnd) and the thermal pad. Is that expected? If so, what is it intended to be connected to?
Hi Cassandra,
This is intended, there's no direct internal connection within the package. Sometimes there is, but this particular device is not.
The intent is to help with the internal temperature measurement. If the GND plane takes up a lot of area, then the thermal resistivity between the ambient air and the GND plane can be considered "low" and any heat dissipated will not build up near the device.
Best,
-Cole
Further measurements on a PGA900 chip show what appears to be a connection between the thermal pad & the internal circuitry. I'm getting 2MΩ-20MΩ typically on most pins relative to the thermal pad, with all pins having some measurable resistance. This is affecting circuit functionality in it's current configuration as I had the thermal pad connected to the case of our device, and if any voltage was present on the case it impacted the functionality of the device significantly. It appears that consistent circuit functionality is obtained if the thermal pad is connected to the internal ground of the device. Is there a recommendation for what the thermal pad should be connected to to ensure reliable circuit operation?
Hi Cassandra,
appears to be a connection between the thermal pad & the internal circuitry.
Hmmm, let me double check the package details. I usually expect a specification in the absolute maximum to give me a hint about this.
For context, sometimes we have a lead frame where the die rests on top of, within the package. The lead-frame is sometimes connected to the thermal pad within the package and there specifically protection diodes and circuitry to bridge the connections. This could be what is happening but I'll need to double check the design files directly. Expect a little delay on this.
Is there a recommendation for what the thermal pad should be connected to to ensure reliable circuit operation?
The GND pins should connect directly to the thermal pad underneath the package and then go straight down to a GND plane. The screenshot below isn't the same device so ignore the direct pin details and layout, but take a look how the vias go directly to the green (GND) layer from underneath the device.
if any voltage was present on the case it impacted the functionality of the device significantly.
Can you be a little more specific about the presence of voltage on the case? Can you do me a favor and measure the voltage between the GND pin and the thermal pad?
I'm interpreting this to mean that your GND connection is not 0V, if you are following the above instructions. Which can lead to a lot more issues, including damage, if it is not controlled. If the thermal pad is not solidly connected to the GND pin, this shows there are grounding issues which is expected behavior.
Best,
-Cole
Can you be a little more specific about the presence of voltage on the case? Can you do me a favor and measure the voltage between the GND pin and the thermal pad?
I'm interpreting this to mean that your GND connection is not 0V, if you are following the above instructions. Which can lead to a lot more issues, including damage, if it is not controlled. If the thermal pad is not solidly connected to the GND pin, this shows there are grounding issues which is expected behavior.
Our current design has the thermal pad connected to a case point on the circuit board, which is then connected to our enclosure's case. We are changing that on the new rev. based on your feedback - we will be connecting the thermal pad to the PGA900 ground. Thank you.