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AWR6843ISK: After power up, change the division factor and clock source of the clock branch of MSS_VCLK after an event.

Cherry Zhou
Mastermind 22235 points
Part Number: AWR6843ISK

Hi team,

Here's an issue from the customer may need your help:

Requirement: After power up, change the division factor and clock source of the clock branch of MSS_VCLK after an event. 

The configuration fields for the divider and clock source corresponding to the MSS_VCLK clock branch in the 520e document are as follows:

  1. CLKSRCSEL1.VCLKCLKSRCSEL is used to configure the clock source for MSS_VCLK
  2. CLKDIVCTL0.VCLKDIV is used to configure the division factor of MSS_VCLK (both fields are readable and writable)

And referenced to this thread, some of these fit the customer's application scenario, but they need more details on the configuration of these two register fields, for example:

Based on the above reply, if the chip power-up process has been completed, can this configuration step be set while the mss_subsystem is in a non-reset state? i.e. what is the chip state required for changes to the VCLKDIV and VCLKSRCSEL fields? 

Could you help look into this case? Thanks.

Best Regards,

Cherry

  • 0
    TI__Expert 3525 points

    Hi Cherry,

    I will take a look into this. I will get back to you within a couple of days!

    Best Regards,
    Kevin 

  • 0
    TI__Expert 3525 points

    Hi Cherry,


    The MSS clock initialization is handled by the boot ROM. Therefore, user shouldn't alter the configurations after device is powered up. Is there a specific reason why this is needed?

    Best Regards,
    Kevin 

  • 0 in reply to Kevin Ortiz
    TI__Mastermind 22235 points

    Hello Kevin,

    Thanks for your support.

    Kevin Ortiz said:
    The MSS clock initialization is handled by the boot ROM. Therefore, user shouldn't alter the configurations after device is powered up.

    If they needs to change the operating frequency of the MSS system to optimize power consumption, such as the modification function for MSS_VCLK in the libsleep packaged in the SDK: 

    The customer needs to implement the same change as this function, which is that one of the values in MSS_VCLK 40-200m can be changed to meet the power consumption needs of the actual project after evaluation. However, currently there is no customizable function available in mmWave_SDK to meet this requirement.

    So they are going to locate these two fields on MSS_VCLK_DIV and _SEL in the register function field, wondering if it is possible to support this function to reconfigure MSS_VCLK, like in libsleep? This configuration process requires information about the status of the system. Because MSS_VCLK is the operating clock for the MSS subsystem, certain configuration prerequisites and configuration logic need to be met. 

    Thanks and regards,

    Cherry

  • 0 in reply to Cherry Zhou
    TI__Mastermind 22235 points

    Hi,

    May I know is there any update?

    Best,

    Cherry

  • +1
    TI__Expert 3525 points

    Hi Cherry, 

    Deepest apologies for the delayed response! That makes sense. If power optimization is the goal, the "xWR6843 Power Optimization" Application Note goes into detail on how to clock gate different clocks, including the MSS. Customer can refer to this for further details and implementation.

    Best Regards,
    Kevin