TMP1075: Behavior when the TMP1075 is powered off.

diverger

Part Number: TMP1075

Hi,

In my design, the TMP1075 is powered with a separate supply. In some situations, it may be powered off while the i2c bus is powered on. I have two questions:

Will this damage the TMP1075? The datasheet says the I2C interface can tolerant 6.5V, and is not limted by V+.
Is the I2C interface high impedance?

Thanks.

over 1 year ago

+1 Josh Wyatt over 1 year ago

TI__Guru* 91166 points

Dear Diverger -

1. The absolute maximum rating for the SDA and SCL inputs is 6.5VDC (please see Table 8.1 on page 6 of the TMP1075 datasheet)

2. Yes, the I2C interface is open drain (high impedance) and pulled to logic level high by the pullup resistor.

0 diverger over 1 year ago in reply to Josh Wyatt

Expert 1195 points

Please confirm that the i2c interface will remain high impedance even the chip is un-powered.

Thanks.

0 Josh Wyatt over 1 year ago in reply to diverger

TI__Guru* 91166 points

Dear diverger -

Yes, the device should not be back powered by the I2C interface, if that is the actual question.

0 diverger over 1 year ago in reply to Josh Wyatt

Expert 1195 points

Yes, I'm considering the 'back-powering' problem. From the datasheet, the non-N version has no ESD diodes to V+ on ALERT pin, so if ALERT is pulled to the host supply with V+ unpowered, there should have no back-powering problem too, right?

Thanks.

0 Josh Wyatt over 1 year ago in reply to diverger

TI__Guru* 91166 points

Dear diverger -

Correct.

I think we will clarify this in the datasheet as a result of your question to clear up the indicated row.

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TMP1075: Behavior when the TMP1075 is powered off.