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AWR2944: ES2 device last 256 KB usage

Sandeep Singh
Prodigy 155 points
Part Number: AWR2944

Hi,

we have RAM shortage, For ES2 device we would like to use last 256kb of memory, which is allocated to RSS in ES1 board

For using that changed below code.

SOC_rcmBSSControl()

{

 // ES2 device

/* Allocate DSS L3 Bank as TCM for BSS */
CSL_FINSR(rssCtrl->BSS_CONTROL, 30, 28, 0x0U);
/* Sets FW development mode */
CSL_FINSR(rssCtrl->BSS_CONTROL, 11, 0, 0x0U);

}

Still with this change our SW is not working properly. 

what else sw changes, need to do, to make it work?

can you help out here?

BR

Sandeep Singh

  • 0
    TI__Mastermind 35425 points

    Hello Sandeep,

    In the ES 2.0 device the 256 kb can be used by default, you do not need to write the code which you have mentioned explicitly.
    It is taken care in the SBL based on the efuse checks in the latest SDK 4.4.0.1.

    Regards,
    Saswat Kumar

  • 0 in reply to Saswat Kumar
    Prodigy 155 points

    Hi Saswat,

    does SDK 4.4.0.1 is released to Aptiv?

    so you mean SOC_rcmBSSControl(), function modification is not required?

    BR

    Sandeep Singh

  • 0 in reply to Sandeep Singh
    TI__Mastermind 35425 points

    Hello Sandeep,

    The SDK 4.4.0.1 is already available on TI.com and the code has been modified to the following:

    void SOC_rcmBSSControl(void)
    {
        CSL_rss_ctrlRegs *rssCtrl = CSL_RSS_CTRL_getBaseAddress();
        CSL_dss_rcmRegs  *ptrDSSRcmRegs = CSL_DSSRCM_getBaseAddress();
        CSL_top_ctrlRegs* ptrTopCtrlRegs = CSL_TopCtrl_getBaseAddress();

        /* Check if the device is ES1.0 or ES2.0 */
        if(CSL_TopCtrl_readPgVerEfuse(ptrTopCtrlRegs) == SOC_RCM_ES2_PG_VER)
        {
            /* Check if the device is ES2.0 */

            /* Do not allocate DSS L3 Bank as TCM for BSS */
            CSL_FINSR(rssCtrl->BSS_CONTROL, 30, 28, 0x0U);
            /* Sets normal boot mode for CR4 */
            CSL_FINSR(rssCtrl->BSS_CONTROL, 11, 0, 0x0U);
        }
        else
        {
            /* Allocate DSS L3 Bank as TCM for BSS */
            CSL_FINSR(rssCtrl->BSS_CONTROL, 30, 28, 0x7U);
            /* Sets FW development mode */
            CSL_FINSR(rssCtrl->BSS_CONTROL, 11, 0, 0x111U);

            /* add 1msec delay. */
            ClockP_usleep(1000);

            /* workaround for AWR2943 memory allocation issue */
            CSL_FINSR(ptrDSSRcmRegs->DSS_L3_BANKD1_PD_CTRL, 2, 0, 0x0U);
        }
    }

    Regards,
    Saswat Kumar
  • 0 in reply to Saswat Kumar
    Prodigy 155 points

    Hi Saswat,

    does BSS logger is optional or required to configure in SOC_rcmPopulateBSSControl()?

    Reason - MSS L2 10260000 space is we used for appl usage..

    /* Configure BSS Logger: current configuration is Disabled. */
    /* To Enable the BSS logger set 2:0 field of RSS_CR4_BOOT_INFO_REG5 register to 0x1. */
    /* The debug data is transferred to a programmable MSS L2 memory buffer with a size of 2KB. */
    /* The BSS splits this 2KB into two halves (ping and pong) to copy the debug logger data. */
    CSL_FINSR(rssProcCtrl->RSS_CR4_BOOT_INFO_REG5, 2, 0, 0);

    /* Configure MSS L2 offset for BSS Logger. */
    /* 0xC0260000 is the transaled address of MSS L2 memory 0x10260000. */
    /* 2KB of memory is needed for BSS to transfer the BSS logger data. */
    /* Applications are required to make sure the 2KB starting from 0x10260000 is reserved for BSS logger. */
    CSL_REG_WR(&rssProcCtrl->RSS_CR4_BOOT_INFO_REG6, 0xC0260000);

    BR

    Sandeep Singh

  • 0 in reply to Sandeep Singh
    TI__Mastermind 35425 points

    Hello Sandeep, 

    It is optional and can be omitted if not required.

    Regards,
    Saswat Kumar

  • 0 in reply to Saswat Kumar
    Prodigy 155 points

    Saswat,

    In SOC_rcmPopulateBSSControl(), 

    CSL_FINSR(rssProcCtrl->RSS_CR4_BOOT_INFO_REG5, 3, 3, 1);

    CSL_FINSR(rssProcCtrl->RSS_CR4_BOOT_INFO_REG5, 15, 4, 0x222U);

    If i will keep uncommented above code, Range,doppler,angle finding processing is not working

    With commneted , Range,doppler,angle finding processing is working but range of detection is coming some garbage value.

    can we have call  on Monday for this(15th May)? if yes, please propose your time.

    Its very urgent, as we have shortage RAM memory.

    BR

    Sandeep Singh

  • 0 in reply to Sandeep Singh
    TI__Mastermind 35425 points

    Hello Sandeep,

    Can you please tell me why have you changed the value to CSL_FINSR(rssProcCtrl->RSS_CR4_BOOT_INFO_REG5, 15, 4, 0x222U)?
    Default value is: 

    CSL_FINSR(rssProcCtrl->RSS_CR4_BOOT_INFO_REG5, 15, 4, 0x333U);
    Can you please match the values provided in the latest SDK and let me know?

    Regards,
    Saswat Kumar
  • +1 in reply to Saswat Kumar
    Prodigy 155 points

    Hi Saswat,

    eventhough this is not working.

    xwr2xxx_radarss_metarprc.bin size reduced to 0x103F from 0x3B174. this changed i missed, let me try with this.

    BR

    Sandeep Singh

  • 0 in reply to Sandeep Singh
    Prodigy 155 points

    Hi Saswat

    this is working now.

    BR

    Sandeep Singh