Other Parts Discussed in Thread: TDA2, MMWCAS-DSP-EVM, MMWCAS-RF-EVM
Our customer wants to develop 4-cascade radar application using AWR2243.
The evaluation module (MMWCAS-DSP-EVM) uses the TDA2 as the back-end processor for the 4-cascade radar, but the TDA2 is for ADAS and would not be recommended for industrial applications.
So our customer is going to use an FPGA as the back-end processor.
The ADC Raw data format over CSI2 and the relevant configurations will need to be configured from the host via SPI.
Information on the ADC Raw data format over CSI2 and the relevant configurations can be found in the documents as follows.
AWR2243 Single-Chip 76- to 81-GHz FMCW Transceiver datasheet (Rev. C)
www.ti.com/.../awr2243.pdf
9.4.1 ADC Data Format Over CSI2 Interface
AWR1xx and AWR22xx Data Path Programmer’s Guide (Rev. A)
www.ti.com/.../swra555a.pdf
4.1.2 CBUFF Configurations
4.1.5 CSI2 Configurations (AWR22xx/AWR12xx specific)
5.1 Packet Formats (AWR22xx/AWR12xx)
mmWave Radar Interface Control Document
dr-download.ti.com/.../mmWave-Radar-Interface-Control.pdf
5.2.5 Sub block 0x0085 – AWR_HIGHSPEEDINTFCLK_CONF_SET_SB
5.16.2 Sub block 0x4041 – AWR_DEV_RX_DATA_FORMAT_CONF_SET_SB
5.16.3 Sub block 0x4042 – AWR_DEV_RX_DATA_PATH_CONF_SET_SB
5.16.5 Sub block 0x4044 – AWR_DEV_RX_DATA_PATH_CLK_SET_SB
5.16.8 Sub block 0x4047 – AWR_DEV_CSI2_CFG_SET_SB
Our customer wants to use mmWave Studio to replace the evaluation module (MMWCAS-DSP-EVM) with their custom FPGA board to test their 4-cascade radar immediately and easily.
Could you tell me what the ADC Raw data format over CSI2 and the relevant configurations are when using the 4-cascade rader (MMWCAS-RF-EVM + MMWCAS-DSP-EVM) in the mmWave studio?
Best regards,
Daisuke
