On AWR2243 datasheet,(June 2022), it says:
"
Data – High-speed serial port following the MIPI CSI2 format. Four data and one clock lane (all differential).
Data from different receive channels can be multiplexed on a single data lane to optimize board routing. This
is a unidirectional interface used for data transfer only.
"
We are wondering if this means we can have each AWR2243 output 1 lane of CSI containing all the data ( instead of 4 lanes).
This is significant, cause in searching for the compute ICs for a 4-chip cacading radar, we often run short of CSI pins.
btw I couldn't find any documentations to elaborate this.
Thanks,
Li
