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TDC7201: What is the actual impact range of the Clock Counter STOP Mask?

raimu yeh
Prodigy 80 points
Part Number: TDC7201

Hi, supporter,

In the TDC7201 datasheet, section 7.3.3.3 "Clock Counter STOP Mask" mentions that setting TDCx_CLOCK_CNTR_STOP_MASK_H and TDCx_CLOCK_CNTR_STOP_MASK_L determines the mask window's size, and the STOP signals within this mask window will be ignored.

Based on my understanding, the mask window should only affect the Clock values in Mode 2 (TDCx_CLOCK_COUNT1 to TDCx_CLOCK_COUNT5). However, when I use Mode 1 measurement mode and set TDCx_CLOCK_CNTR_STOP_MASK_H and TDCx_CLOCK_CNTR_STOP_MASK_L, it seems to impact the Time clock values as well (TDCx_TIME1 to TDCx_TIME6).

Could you please confirm if this behavior is correct?

  • +1
    TI__Mastermind 21650 points

    Hello Raimu,

    Thanks for posting to the sensing forum! The Clock Counter STOP Mask is active in both mode 1 and mode 2. 

    It is independent of the measurement clock since the STOP_MASK value just disables the STOP signal from generating a measurement until the configured number of external clock cycles entered in the TDCx_CLOCK_CNTR_STOP_MASK_H and TDCx_CLOCK_CNTR_STOP_MASK_L have passed. Once this configured time has elapsed the device can time the STOP pulses.

    So this behavior is correct, please let me know if there are any other questions!

    Best,

    Isaac

  • 0 in reply to Isaac Lara
    Prodigy 80 points

    Hi, Isaac

    Apologies, let me confirm my understanding again.

    In other words, taking a clock frequency of 16MHz as an example, the MASK WINDOW is a multiple of 62.5ns. If a STOP signal occurs within the 62.5ns time window, the MASK WINDOW will not filter it out. Is this understanding correct?

    Additionally, how are rising edges and falling edges determined?

    Best,

    Raimu

  • 0 in reply to raimu yeh
    TI__Mastermind 21650 points

    Hello Raimu,

    No worries, but that is correct considering a 16MHz clock then the length of the STOP mask window are multiples of 62.5ns and the multiples are of course based on the values in the CLOCK_CNTR_STOP_MASK_x registers.

    If I enter a 1 in the CLOCK_CNTR_STOP_MASK_L register then that means any STOP that occurs before 62.5ns will be filtered out, any STOPs that occur after the 62.5ns will count as a valid STOP pulse for the timer. If a 2 is entered then all pulses that occur before 125ns are filtered out and only pulses that occur after the 125ns timed by the device.

    I am not sure what you mean by how the rising edges or the falling edges are determined, if you could expand on this question that would help.

    But for some additional detail say if your STOP mask is set to 125ns but the STOP pulse went high at 100ns and your pulse has a length of 30ns. This means that your pulse with go low at 130ns which is past the 125ns STOP mask. If the device has a rising edge STOP polarity this will not trigger a measurement since the rising edge will only be detected after the STOP mask.

    Best,

    Isaac

  • 0 in reply to Isaac Lara
    Prodigy 80 points

    Hi, Issac,

    Thank you for requesting a more detailed explanation of STOP MASK.

    I apologize for the vague explanation regarding rising and falling edges. This refers to the rising and falling edges of the START and STOP signals. As per Chapter 6.3 "Recommended Operating Conditions," the maximum rise and fall times (20% to 80%) are specified as 1ns. Could you please clarify what effects would occur if the rise and fall times are greater or smaller than this value?

    Best,

    Raimu

  • 0 in reply to raimu yeh
    TI__Mastermind 21650 points

    Hello Raimu,

    Thanks for the clarification, if the slew rate is higher than the 1ns it is possible to damage the digital input for the START and STOP signals.

    In order to achieve the 1ns rise or fall time you would require a larger current to ramp the voltage, the inputs are not really built to handle large currents.

    Best,

    Isaac