AWR2944: config advanced chirp tx_en

Hi,

What is error you are getting while trying to run this code. Please share a snippet of the error code.

Thanks,

Pradipta.

Hi:

no error during the configuration.

but the RF doesn't work，It looks like 4 Tx channels  don't enable， The current is low. 

Maybe the lut array has some problem, and bss can't parse TX_EN.

Thanks

Hi,

Have you enabled all the Tx in the channel configuration. Also, in chirp configuration have you set the Tx enable value. 

Also we also a example code which utilizes all the API's of the mmwavelink library. We have implemented this feature in the example as well. 

Path: C:\ti\**Latest SDK folder\** Latest DFP folder**\ti\control\mmwavelink\test

Thanks,

Pradipta.

Hi:

Tx chanel is:4Tx and 4Rx

/* Populate the default configuration: */
ChanCfg.rxChannelEn = RX_CHANNEL_1_2_3_4_ENABLE;/*/RX_CHANNEL_1_2_3_4_ENABLE*/
ChanCfg.txChannelEn = TX_CHANNEL_1_2_3_4_ENABLE;
ChanCfg.cascading = 0u; /* Single Chip (no cascading)*/
ChanCfg.cascadingPinoutCfg = 0;
retVal = rlSetChannelConfig(RL_DEVICE_MAP_INTERNAL_BSS,&ChanCfg);

Reference the DFP_02_04_08_01 example, and there is no error during config. but the RF tx isn't on(I think)

Hi,

1) Can you confirm if you run the OOB demo on your kit does the RF work?

2) Also please provide the sequence of APi calls you make in your application code along with the param set. You can also refer to the ICD in the docs folder in the DFP for the API programming sequence. 

Thanks,

Pradipta.

Hi:

1) we use general chirp API: rlSetChirpConfig(), others are same，the RF works.

2) the advanced chirp config sequenceis：

2.1 channel cfg
/* Populate the default configuration: */
ChanCfg.rxChannelEn= RX_CHANNEL_1_2_3_4_ENABLE;/*/RX_CHANNEL_1_2_3_4_ENABLE*/
ChanCfg.txChannelEn = TX_CHANNEL_1_2_3_4_ENABLE;
ChanCfg.cascading = 0u; /* Single Chip (no cascading)*/
ChanCfg.cascadingPinoutCfg = 0;
retVal = rlSetChannelConfig(RL_DEVICE_MAP_INTERNAL_BSS,&ChanCfg);

2.2 profile cfg
retVal = rlSetProfileConfig (RL_DEVICE_MAP_INTERNAL_BSS, 4U, &profileCfg[0]);

2.3 misc cfg
RfMIsCon.miscCtl = 0x3;
retVal = rlRfSetMiscConfig(RL_DEVICE_MAP_INTERNAL_BSS,&RfMIsCon);

2.4 advanced chirp cfg
#define CHIRPS_PER_CYCLE 192
#define LUT_ADVCHIRP_TABLE_SIZE 12*1024
#define DUMMY_LUT_ADDR_OFFSET 3*1024
rlInt8_t AdvChirpLUTData[LUT_ADVCHIRP_TABLE_SIZE] = { 0 };

static int32_t AdvancedChirpCfg (void)
{
/* profile ID LUT dither local buffer */
rlInt8_t ProfileCfgData[2] = { 0 };
rlInt8_t StartFreqSlopeData[CHIRPS_PER_CYCLE] = { 0 };
/* Tx Enable LUT dither local buffer */
rlUInt8_t TxEnCfgData[CHIRPS_PER_CYCLE] = { 0 };
/* Tx0 Phase shifter LUT dither local buffer */
rlInt8_t Tx0PhShiftData[CHIRPS_PER_CYCLE] = { 0 };
rlAdvChirpLUTTx1PhShiftCfg_t AdvChirpLUTTx1PhShiftCfgArgs = { 0 };
/* Tx1 Phase shifter LUT dither local buffer */
rlInt8_t Tx1PhShiftData[CHIRPS_PER_CYCLE] = { 0 };
rlAdvChirpLUTTx2PhShiftCfg_t AdvChirpLUTTx2PhShiftCfgArgs = { 0 };
/* Tx2 Phase shifter LUT dither local buffer */
rlInt8_t Tx2PhShiftData[CHIRPS_PER_CYCLE] = { 0 };
/* Tx3 Phase shifter LUT dither local buffer */
rlInt8_t Tx3PhShiftData[CHIRPS_PER_CYCLE] = { 0 };
rlUInt8_t BpmEnCfgData[CHIRPS_PER_CYCLE] = { 0 };
rlInt16_t IdleTimeData[CHIRPS_PER_CYCLE] = { 0 };
rlInt16_t ADCStartTimeData[CHIRPS_PER_CYCLE] = { 0 };

uint16_t i;
/* Frequency start LUT dither local buffer */
rlInt16_t StartFreqData[CHIRPS_PER_CYCLE] = { 0 }; /* Change this based on the chirp param size*/

rlAdvChirpCfg_t AdvChirpCfgArgs = { 0 };
rlFillLUTParams_t rlFillLUTParamsArgs = { 0 };
rlAdvChirpLUTCfg_t rlAdvChirpLUTCfgArgs = { 0 };
rlAdvChirpLUTTx0PhShiftCfg_t AdvChirpLUTTx0PhShiftCfgArgs = { 0 };

int32_t retVal = RL_RET_CODE_OK;
int32_t bufIdx = 0;

memset(&AdvChirpLUTData[0], 0x0, LUT_ADVCHIRP_TABLE_SIZE);

/* Configure Profile (Param Index = 0) */
/* Fixed delta dither is not supported for profile parameter */
/* Fixed Profile ID:0 for all the chirps */
/* Chirp Profile */
/* 0-N 0 */
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_CHIRP_PROFILE_VAR;
AdvChirpCfgArgs.lutResetPeriod = CHIRPS_PER_CYCLE; /* reset back to original offset after 2nd burst (512*2) chirps */
AdvChirpCfgArgs.lutParamUpdatePeriod = CHIRPS_PER_CYCLE/2;//1;//CHIRPS_PER_CYCLE/2;
AdvChirpCfgArgs.lutPatternAddressOffset = 0;
AdvChirpCfgArgs.numOfPatterns = 2;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - RL_LUT_CHIRP_PROFILE_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}

/* profile index */
ProfileCfgData[0] = 0;
ProfileCfgData[1] = 1;
// ProfileCfgData[2] = 2;
// ProfileCfgData[3] = 3;

/* fill up the Chirp LUT buffer which is used later for rlSetAdvChirpLUTConfig API */
rlFillLUTParamsArgs.chirpParamIndex = RL_LUT_CHIRP_PROFILE_VAR;
rlFillLUTParamsArgs.inputSize = AdvChirpCfgArgs.numOfPatterns;
rlFillLUTParamsArgs.lutGlobalOffset = lutOffsetInNBytes;
rlFillLUTParamsArgs.chirpParamSize = AdvChirpCfgArgs.lutChirpParamSize;
retVal = rlDevSetFillLUTBuff(&rlFillLUTParamsArgs, &ProfileCfgData[0], &AdvChirpLUTData[lutOffsetInNBytes], &lutOffsetInNBytes);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - set RL_LUT_CHIRP_PROFILE_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}
else
{
printf("set RL_LUT_CHIRP_PROFILE_VAR lutOffsetInNBytes: %d, chirpParamSize: %d\n", lutOffsetInNBytes, AdvChirpCfgArgs.lutChirpParamSize);
}

/* reserved starting 16 WORD for param type with Fixed dither */
//lutOffsetInNBytes += RESERVED_DITHER_LUT_SIZE * 4; /* convert that into bytes */

/* Start Frequency (Param Index = 1) */
/* For given modulation scheme (increase and decrease startFreq dither), we can't use delta dither but LUT dither.
*/
/* Configuring 512 *2 unique start frequency LUT dither (+0.0014, +0.0014*2...., +0.0014*511, -0.0014,-0.0014*2...., -0.0014*511) GHz : 1.4MHz increment at every chirp till 512, then decrement by -1.4MHz at every chirp till next 512 chirps */
/* The new start frequency LUT dither is picked every chirp (update period = 1) and it will reset every [512 * 2] chirps [= at 2 bursts] */
/* Chirp Start Freq (from Profile) + LUT dither + Fixed delta dither
0 77 GHz + 0.0014 GHz + 0
1 77 GHz + 0.0014 *2 GHz + 0
2 77 GHz + 0.0014 *3 GHz + 0
........
........
511 77 GHz + 0.0014 *511 GHz + 0

512 77 GHz - 0.0014 GHz + 0
513 77 GHz - 0.0014 *2 GHz + 0
514 77 GHz - 0.0014 *3 GHz + 0
........
........
1023 77 GHz - 0.0014 *511 GHz + 0

(LUT dither reset period = 1024) and so on */
/* LUT start address offset for the start frequency chirp parameter is made 4 */
/* AdvChirpLUTData[4] is the start address offset (Offset = 4), Each data parameter is 2 bytes (used lutChirpParamSize = 1 and lutChirpParamScale = 0) */
memset((void *)&AdvChirpCfgArgs, 0, sizeof(rlAdvChirpCfg_t));
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_CHIRP_FREQ_START_VAR;
AdvChirpCfgArgs.resetMode = 1;
AdvChirpCfgArgs.deltaResetPeriod = 0;
AdvChirpCfgArgs.deltaParamUpdatePeriod = 1;
AdvChirpCfgArgs.sf0ChirpParamDelta =34953;
AdvChirpCfgArgs.sf1ChirpParamDelta =34953;
AdvChirpCfgArgs.lutResetPeriod = CHIRPS_PER_CYCLE;
AdvChirpCfgArgs.lutParamUpdatePeriod = 1;
AdvChirpCfgArgs.lutPatternAddressOffset =lutOffsetInNBytes;//4; /* start address offset (4 bytes boundary) for this chirp_param_type */
AdvChirpCfgArgs.numOfPatterns = CHIRPS_PER_CYCLE;
AdvChirpCfgArgs.lutChirpParamSize = 1; /* 2 byte size of each freqStart dither var */
AdvChirpCfgArgs.lutChirpParamScale = 0;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);

if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - RL_LUT_CHIRP_FREQ_START_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}

/* Dividing the input param data by 1 LSB . 1 LSB = ((3.6 * 10^9)/2^26) * 2^Scale Hz = (3.6 * 2^Scale)/2^26 GHz */
for(i=0; i < CHIRPS_PER_CYCLE; i++)
{
StartFreqData[i] = 0;

}

/* fill up the Chirp LUT buffer which is used later for rlSetAdvChirpLUTConfig API */
rlFillLUTParamsArgs.chirpParamIndex = RL_LUT_CHIRP_FREQ_START_VAR;
rlFillLUTParamsArgs.chirpParamSize = AdvChirpCfgArgs.lutChirpParamSize;
rlFillLUTParamsArgs.inputSize = AdvChirpCfgArgs.numOfPatterns;
rlFillLUTParamsArgs.lutGlobalOffset = lutOffsetInNBytes;

retVal = rlDevSetFillLUTBuff(&rlFillLUTParamsArgs, (rlInt8_t*)&StartFreqData[0], &AdvChirpLUTData[lutOffsetInNBytes], &lutOffsetInNBytes);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - set RL_LUT_CHIRP_FREQ_START_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}
else
{
printf("set RL_LUT_CHIRP_FREQ_START_VAR lutOffsetInNBytes: %d, chirpParamSize: %d\n", lutOffsetInNBytes, AdvChirpCfgArgs.lutChirpParamSize);
}
/* Frequency Slope (Param Index = 2) */
/* LUT Dither to this chirp param type */
/* LUT start address offset for the slope chirp parameter is made 2056 */
memset((void *)&AdvChirpCfgArgs, 0, sizeof(rlAdvChirpCfg_t));
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_CHIRP_FREQ_SLOPE_VAR;
AdvChirpCfgArgs.deltaResetPeriod =CHIRPS_PER_CYCLE;//0;//CHIRPS_PER_CYCLE;
AdvChirpCfgArgs.deltaParamUpdatePeriod =0;//1;//0;
AdvChirpCfgArgs.lutResetPeriod = CHIRPS_PER_CYCLE;
AdvChirpCfgArgs.lutParamUpdatePeriod = 1;
AdvChirpCfgArgs.lutPatternAddressOffset =lutOffsetInNBytes;
AdvChirpCfgArgs.numOfPatterns = CHIRPS_PER_CYCLE;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - RL_LUT_CHIRP_FREQ_SLOPE_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}

for(i=0; i < CHIRPS_PER_CYCLE; i++)
{
StartFreqSlopeData[i] = 0;

}

/* fill up the Chirp LUT buffer which is used later for rlSetAdvChirpLUTConfig API */
rlFillLUTParamsArgs.chirpParamIndex = RL_LUT_CHIRP_FREQ_SLOPE_VAR;
rlFillLUTParamsArgs.inputSize = AdvChirpCfgArgs.numOfPatterns;
rlFillLUTParamsArgs.lutGlobalOffset = lutOffsetInNBytes;
retVal = rlDevSetFillLUTBuff(&rlFillLUTParamsArgs, (rlInt8_t*)&StartFreqSlopeData[0], &AdvChirpLUTData[lutOffsetInNBytes], &lutOffsetInNBytes);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - set RL_LUT_CHIRP_FREQ_SLOPE_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}
else
{
printf("set RL_LUT_CHIRP_FREQ_SLOPE_VAR lutOffsetInNBytes: %d, chirpParamSize: %d\n", lutOffsetInNBytes, AdvChirpCfgArgs.lutChirpParamSize);
}

/* Idle time (Param Index = 3) */
/* Fixed idle time delta dither 2 us at every 512 chirp (update period = 512) and it will reset every 512*3 chirps.
NO LUT DITHER applied here. */
/* Chirp Idle time (from Profile) + LUT dither + Fixed delta dither
0-511 100 us + 0 + 0
512-1023 100 us + 0 + 2 us
1024-1535 100 us + 0 + 2*2 us
(Delta dither reset period = 512*3 ) and so on */
/* Number of unique LUT dither parameters (4) */

memset((void *)&AdvChirpCfgArgs, 0, sizeof(rlAdvChirpCfg_t));
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_CHIRP_IDLE_TIME_VAR;
AdvChirpCfgArgs.deltaResetPeriod = 1;//0;//1;//CHIRPS_PER_CYCLE*3; /* Reset delta at 512 * 3 */
AdvChirpCfgArgs.deltaParamUpdatePeriod = 0;//1;//0;//CHIRPS_PER_CYCLE; /* add delta value after 512 chirps */
AdvChirpCfgArgs.lutResetPeriod = 1;//CHIRPS_PER_CYCLE;//1;
AdvChirpCfgArgs.lutParamUpdatePeriod = 0;//1;//0;
AdvChirpCfgArgs.lutPatternAddressOffset = DUMMY_LUT_ADDR_OFFSET;//lutOffsetInNBytes;//DUMMY_LUT_ADDR_OFFSET;
AdvChirpCfgArgs.numOfPatterns = 1;//CHIRPS_PER_CYCLE;
AdvChirpCfgArgs.lutChirpParamScale = 0;
AdvChirpCfgArgs.lutChirpParamSize = 0;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - RL_LUT_CHIRP_IDLE_TIME_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}

/* ADC start time (Param Index = 4) */
/* No Dither to this chirp param type */
memset((void *)&AdvChirpCfgArgs, 0, sizeof(rlAdvChirpCfg_t));
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_CHIRP_ADC_START_TIME_VAR;
AdvChirpCfgArgs.lutResetPeriod = 1;//CHIRPS_PER_CYCLE;//1;
AdvChirpCfgArgs.lutParamUpdatePeriod = 0;//1;//0;
AdvChirpCfgArgs.lutPatternAddressOffset = DUMMY_LUT_ADDR_OFFSET;//lutOffsetInNBytes;//DUMMY_LUT_ADDR_OFFSET; /* Fixed LUT pattern to zero offset */
AdvChirpCfgArgs.numOfPatterns = 1;//CHIRPS_PER_CYCLE;
AdvChirpCfgArgs.lutChirpParamScale = 0;
AdvChirpCfgArgs.lutChirpParamSize = 0;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - rlSetAdvChirpConfig failed with error code %d*** \n\n", retVal);
return retVal;
}

/* Tx Enable (Param Index = 5) */
/* Fixed delta dither is not supported for Tx Enable parameter */
/* Configuring 4 unique Tx enable mask (7,3,1,2) in the generic SW LUT - LUT Reset period (4) */
/* The new Tx enable mask is picked every chirp (update period = 1) and it will reset every 4 chirps */
/* Chirp (burst) Tx enable mask
0-511 1
512-1023 2
1024-1535 4
1536-2047 8 and then reset */
/* Each data parameter is 4 bits */
memset((void *)&AdvChirpCfgArgs, 0, sizeof(rlAdvChirpCfg_t));
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_CHIRP_TX_EN_VAR;
AdvChirpCfgArgs.lutResetPeriod = CHIRPS_PER_CYCLE;
AdvChirpCfgArgs.lutParamUpdatePeriod = 1;
AdvChirpCfgArgs.lutPatternAddressOffset = lutOffsetInNBytes;//lutOffsetInNBytes;//DUMMY_LUT_ADDR_OFFSET;//2188;
AdvChirpCfgArgs.numOfPatterns = CHIRPS_PER_CYCLE;//1;//CHIRPS_PER_CYCLE;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - rlSetAdvChirpConfig failed with error code %d*** \n\n", retVal);
return retVal;
}

for(i = 0; i < CHIRPS_PER_CYCLE; i++)
{
TxEnCfgData[i] = 0x7;

}
/* fill up the Chirp LUT buffer which is used later for rlSetAdvChirpLUTConfig API */
rlFillLUTParamsArgs.chirpParamIndex = RL_LUT_CHIRP_TX_EN_VAR;
rlFillLUTParamsArgs.chirpParamSize = AdvChirpCfgArgs.lutChirpParamSize;
rlFillLUTParamsArgs.inputSize = AdvChirpCfgArgs.numOfPatterns;
rlFillLUTParamsArgs.lutGlobalOffset = lutOffsetInNBytes;
retVal = rlDevSetFillLUTBuff(&rlFillLUTParamsArgs, (rlInt8_t*)&TxEnCfgData[0], &AdvChirpLUTData[lutOffsetInNBytes], &lutOffsetInNBytes);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - set RL_LUT_CHIRP_TX_EN_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}
else
{
printf("set RL_LUT_CHIRP_TX_EN_VAR lutOffsetInNBytes: %d, chirpParamSize: %d\n", lutOffsetInNBytes, AdvChirpCfgArgs.lutChirpParamSize);
}

/* BPM Enable (Param Index = 6) */
/* No LUT or Delta Dither for BPM Enable parameter */

memset((void *)&AdvChirpCfgArgs, 0, sizeof(rlAdvChirpCfg_t));
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_CHIRP_BPM_VAL_VAR;
AdvChirpCfgArgs.lutResetPeriod = 1;//CHIRPS_PER_CYCLE;//1;
AdvChirpCfgArgs.lutParamUpdatePeriod = 0;//1;//0;
AdvChirpCfgArgs.lutPatternAddressOffset = DUMMY_LUT_ADDR_OFFSET;//lutOffsetInNBytes;//DUMMY_LUT_ADDR_OFFSET; /* Fixed LUT pattern to offset */
AdvChirpCfgArgs.numOfPatterns = 1;//CHIRPS_PER_CYCLE;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - RL_LUT_CHIRP_BPM_VAL_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}

/* TX0 Phase shifter (Param Index = 7) */
/* No Delta or LUT dither for TX0 phase shifter */
memset((void *)&AdvChirpCfgArgs, 0, sizeof(rlAdvChirpCfg_t));
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_TX0_PHASE_SHIFT_VAR;
AdvChirpCfgArgs.lutResetPeriod = 1;//CHIRPS_PER_CYCLE;//1;
AdvChirpCfgArgs.lutParamUpdatePeriod = 0;//1;//0;
AdvChirpCfgArgs.lutPatternAddressOffset = DUMMY_LUT_ADDR_OFFSET;//lutOffsetInNBytes; /* Fixed LUT pattern to offset */
AdvChirpCfgArgs.numOfPatterns = 1;//CHIRPS_PER_CYCLE;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - rlSetAdvChirpConfig failed with error code %d*** \n\n", retVal);
return retVal;
}

/* TX1 Phase shifter (Param Index = 8) */
/* No Delta or LUT dither for TX0 phase shifter */
memset((void *)&AdvChirpCfgArgs, 0, sizeof(rlAdvChirpCfg_t));
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_TX1_PHASE_SHIFT_VAR;
AdvChirpCfgArgs.lutResetPeriod = 1;//CHIRPS_PER_CYCLE;//1;
AdvChirpCfgArgs.lutParamUpdatePeriod = 0;//1;//0;
AdvChirpCfgArgs.lutPatternAddressOffset = DUMMY_LUT_ADDR_OFFSET;//lutOffsetInNBytes; /* Fixed LUT pattern to offset */
AdvChirpCfgArgs.numOfPatterns =1;// CHIRPS_PER_CYCLE;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - RL_LUT_TX1_PHASE_SHIFT_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}

/* TX2 Phase shifter (Param Index = 9) */
/* No Delta or LUT dither for TX2 phase shifter */
memset((void *)&AdvChirpCfgArgs, 0, sizeof(rlAdvChirpCfg_t));
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_TX2_PHASE_SHIFT_VAR;
AdvChirpCfgArgs.lutResetPeriod = 1;//CHIRPS_PER_CYCLE;//1;
AdvChirpCfgArgs.lutParamUpdatePeriod = 0;//1;//0;
AdvChirpCfgArgs.lutPatternAddressOffset = DUMMY_LUT_ADDR_OFFSET;//lutOffsetInNBytes; /* Fixed LUT pattern to offset */
AdvChirpCfgArgs.numOfPatterns = 1;//CHIRPS_PER_CYCLE;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - RL_LUT_TX2_PHASE_SHIFT_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}

/* TX3 Phase shifter (Param Index = 10) */
/* No Delta or LUT dither for TX0 phase shifter */
memset((void *)&AdvChirpCfgArgs, 0, sizeof(rlAdvChirpCfg_t));
AdvChirpCfgArgs.chirpParamIdx = RL_LUT_TX3_PHASE_SHIFT_VAR;
AdvChirpCfgArgs.lutResetPeriod = 1;//CHIRPS_PER_CYCLE;//1;
AdvChirpCfgArgs.lutParamUpdatePeriod = 0;//1;//0;
AdvChirpCfgArgs.lutPatternAddressOffset = DUMMY_LUT_ADDR_OFFSET;//lutOffsetInNBytes; /* Fixed LUT pattern to zero offset */
AdvChirpCfgArgs.numOfPatterns = 1;//CHIRPS_PER_CYCLE;

retVal = rlSetAdvChirpConfig(RL_DEVICE_MAP_INTERNAL_BSS, &AdvChirpCfgArgs);
if (retVal != RL_RET_CODE_OK)
{
printf("*** Failed - RL_LUT_CHIRP_TX_EN_VAR failed with error code %d*** \n\n", retVal);
return retVal;
}

while(lutOffsetInNBytes%4 != 0)
{
lutOffsetInNBytes+=1;
}

/* Send the locally programmed LUT data to the device */
rlAdvChirpLUTCfgArgs.lutAddressOffset = 0;
rlAdvChirpLUTCfgArgs.numBytes = lutOffsetInNBytes;

retVal = rlSetMultiAdvChirpLUTConfig(RL_DEVICE_MAP_INTERNAL_BSS, &rlAdvChirpLUTCfgArgs, &AdvChirpLUTData[0]);

if (retVal != RL_RET_CODE_OK)
{
printf("rlSetMultiAdvChirpLUTConfig for deviceMap %u failed with error code %d \n\n", RL_DEVICE_MAP_INTERNAL_BSS, retVal);

}
else
{
printf("rlSetMultiAdvChirpLUTConfig success for deviceMap %u with lutAddressOffset = %d and numBytes = %d\n\n", RL_DEVICE_MAP_INTERNAL_BSS, rlAdvChirpLUTCfgArgs.lutAddressOffset, rlAdvChirpLUTCfgArgs.numBytes);
}
test_print ("advanced chirp.\n");
return retVal;
}

2.5 advanced frame cfg
retVal = rlSetAdvFrameConfig(RL_DEVICE_MAP_INTERNAL_BSS, &advFrameCfg);

2.6 RF start
retVal = rlSensorStart(RL_DEVICE_MAP_INTERNAL_BSS);

Hi：

Set the Tx enable Cfg data: 0xF, the RF dont work.

maybe the RF cant parse the store lut data format, takes the Tx enable Cfg 0xF to 0x0, but the config has no error.

Thanks

Hi:

1) the DFP is:mmwave_mcuplus_sdk_04_03_00_01\mmwave_dfp_02_04_06_00

2) C:\ti\mmwave_mcuplus_sdk_04_03_00_01\mmwave_dfp_02_04_06_00\ti\control\mmwavelink

there is not test folder

Hi,

You are currently using an older version of the SDK hence not able to find this folder. Will request you to move to the latest SDK where you will find this folder.

Thanks,

Pradipta.

Hi:

ok, I try to use mmwave_mcuplus_sdk_04_04_00_01\mmwave_dfp_02_04_08_01.