Datasheet Of AWR2243:
In table : Table 10-1. Monitoring and Diagnostic Mechanisms for AWR2243
3, End to End ECC for MSS R4F TCM Memories, why this safe mechanism is related with AWR2243, i think it decribe SM on host MCU . Do you think so ?
the same siution on 10 Cyclic Redundancy Check – Main SS..
I don't know why this kind of safety mechanism are written in the datasheet of AWR2243 ?
