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AWR2944EVM: More info about the layout of the TCMA and TCMB at the link.cmd of the SDK

Sonia Yang
Intellectual 460 points
Part Number: AWR2944EVM
Other Parts Discussed in Thread: AWR2944

Hi

   I have some questions about the TCMA and the TCMB:

Background:

The link.cmd in the SDK (mmwave_mcuplus_sdk_04_04_01_02\ti\platform\awr2944\r5f_linker_enet.cmd) shown in the below picture:

a. Does the section of  RESET_VECTORS and TCMA_RAM belong to the TCMA_ROM_CR5A?

b. What does the TCMA_RAM use for? 

c. And has the R5F_RBL been put this area(TCMA_RAM), because the TCMA_ROM_CR5A size is 128KB, but the sum size of the RESET_VECTORS and TCMA_RAM is only 64KB.

d. TCMB_RAM size is 64KB, does that means the CPU of the SDK demo is in lock-step mode?

e. But why do not we use the TCMA_RAM_CR5A?

BR 

Sonia Yang 

  • 0
    TI__Guru 69960 points

    Hi,

    In the linker command file, 0x00000 address connects to TCMA_RAM_CR5A only for the application/SBL.

    For the RBL (ROM Bootloader) 0x0000 is connected to TCMA_ROM_CR5A, and when RBL switches (eclipse) to SBL then ROM memory is hidden with 0x0000 memory now connects to TCMA_RAM_CR5A. 0x0000_0000 and 0x0002_0000 both addresses are connected to same physical address of RCMA_RAM_CR5A post RBL switches to SBL and later to application.

    RBL loads only 640B of memory to TCMA (only for vector table), so it is recommended to use only initial few TCMA memory in the SBL binary. But for application it is decide as it requires, as SBL (customer written) is the one which loads the application, so SBL can control memory loading TCMA/B or L2 memories.

    AWR2944 device supports only lock-step mode not dual-mode, so refer TRM based on this understanding only.

    .

    ------- EDIT-----

    RBL loads only 640 Bytes of memory to TCMA (for IVT).

    --------------

    Regards,

    Jitendra

  • 0 in reply to Jitendra Gupta
    Intellectual 460 points

    hi Jitendra，

        Thanks for your reply.

    You said:

    RBL loads only 614KB of memory to TCMA (only for vector table), so it is recommended to use only initial few TCMA memory in the SBL binary.

    So I have two points want to confirmed:

    1. Do you means that the RBL only can load 64KB to TCMA?    Is 614KB just a clerical error?

    2. For the TCMA use case:

    If the first one is 64KB, and refer to the TRM, the TCMA_RAM_CR5A is 64KB, so does that means we can used the whole memory of the TCMA_RAM_CR5A in the SBL?

    Regards,

    Sonia Yang

  • 0 in reply to Jitendra Gupta
    Intellectual 460 points

    Hi Jitendra,

    About this part, I also have a doubt about the size of the TCMA_RAM.

    Because refer to the TRM the MSS_TCMA_CR5A that access by the RSS that size is 192KBytes(128KBytes+64KBytes), does that means that MSS also can use the 192KBytes start from 0x0000 0000 to put codes?

  • +1 in reply to Sonia Yang
    TI__Guru 69960 points

    Hi Sonia,

    Sonia Yang said:
    1. Do you means that the RBL only can load 64KB to TCMA?    Is 614KB just a clerical error?

    Looks like there was a typo in my last reply, rectified above (640 bytes is correct not 614KB).

    .

    Sonia Yang said:
    If the first one is 64KB, and refer to the TRM, the TCMA_RAM_CR5A is 64KB, so does that means we can used the whole memory of the TCMA_RAM_CR5A in the SBL?

    Yes, SBL can use whole memory of TCMA_RAM_CR5A during the execution BUT not for the code.

    But be noted that RBL can load SBL content to only MSS_L2 memory area only, so SBL binary (.txt, .code etc.) must be connected to L2 memory only.

    .

    Sonia Yang said:
    Because refer to the TRM the MSS_TCMA_CR5A that access by the RSS that size is 192KBytes(128KBytes+64KBytes), does that means that MSS also can use the 192KBytes start from 0x0000 0000 to put codes?

    We are already found this point of confusion in the TRM and rectified it, upcoming version (end of this week) will have this resolved.

    Here is the snapshot from internal TRM version