In some of the doc for DCA1000 trouble shooting, I see the terminology power cycling DCA1000EVM. What does power cycling means here.
I see FPGA reset button, clicking that or reconnecting all the cables.
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In some of the doc for DCA1000 trouble shooting, I see the terminology power cycling DCA1000EVM. What does power cycling means here.
I see FPGA reset button, clicking that or reconnecting all the cables.
Dear Gayatri -
Thanks for the post. In the context of https://www.ti.com/lit/ug/spruij4a/spruij4a.pdf , power cycle means to remove power from the DCA1000 and re-apply it. With this hardware, that would mean remove +5VDC input (either from the DC power jack or from high density connector J3), from whichever power source input you are using.
Thanks for the quick reply.
Couple more follow up questions based on the guide you shared.
1. What does hardware reset indicates. Is it same as powering on and off?
2. Also one of the trouble shooting says, "Check EEPROM connectivity and address lines on hardware.". How to do this?
Dear Gayatri -
The EEPROM_RD_FAIL_LED (LD9) will be illuminated if EEPROM connectivity or otherwise has an issue.
You would check SW2.6 then for where the Ethernet config data was coming from.
Hardware reset with power cycle to me would be complete disconnection of power adapter and USB cords, which would provide a power cycle and a re-enumeration of the COM ports.