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FDC1004: Maximum performances of FDC1004

Didier Roziere
Prodigy 10 points
Part Number: FDC1004

Hi,

We are testing Evaluation board FDC1004EVM to measure small capacitances.

We have an important constraint about the good stability of capacitive offset in the time and with temperature.

Our goal is to measure small capacitance  (for example 1pF) with a few fF error on temperature range from -20°C to 85°C.

We tested Evaluation board from 24°C to 44°C and 24°C to 84°C temperature range.

We tested the chip in single-ended mode and differential mode.

We get a good offset drift when there is no capacitance between CIN and SHLD.

But when we add a capacitance between CIN and SHLD (10pF or more) on one CIN channel or all channels, we observe a strong jump (5fF to 50fF) on all channels. These jumps appear at a temperature close to 40°C.

When temperature returns under 40°C, the offset errors becomes good again..

Could you please give us a first comment about these behaviors?

Are there specific parameters on this chip to improve offset stability in comparison with our results?

Thank in advance for your help.

Best regards

Didier

  • 0
    TI__Mastermind 40295 points

    Didier,

    Thanks for your post.

    Please forgive me if you know this already, but the SHLD driver attempts to create exactly the same waveform on the SHLD as on the sensor.
    The idea is to minimize the potential difference - and therefor the mutual capacitance - between sensor and SHLD, and let the low output impedance of the SHLD driver output reject any EMI incident on the shield (kind of like a grounded shield). 

    Connecting a capacitor between CIN to a SHLD falls outside of the anticipated use the the FDC1004 and is not considered normal operation. 
    We have no data or guidance to offer for that mode of operation. 

    Regards,
    John

  • 0 in reply to John Miller - Sensing
    Prodigy 10 points

    Hi John,

    Thank you for your prompt reply.

    The 10 pF that we added simulates just the real coupling capacitance between electrode + track and SHLD shielding.

    For us this 10pF is completely classic and relatively small in comparison with electrical structure of capacitive probe or sensor as described in Ti applications.

    We found on this Forum a similar post by Franz Schellhase: FDC1004: Steps in capacitance between 40C and 50C. 

    Is there an explination of this phenomenon?

    Is there a solution to reduce these jumps?

    Thank you

    Didier

  • 0 in reply to Didier Roziere
    TI__Mastermind 40295 points

    Didier,

    The CINx pins serve as inputs of clocked, high-precision switched-capacitor filters, and the SHLDx output driver is a low-impedance buffer amp capable of driving  up to 400pF. 

    As a guess, I'd say the SHLD signal is probably distorting the nominal signal on the sensors which results in the behavior you are seeing. 

    But this is just a guess, because a connection between these two pins falls outside of normal operation, so we haven't characterized the device's behavior for this condition.

    regards,
    John