AWR2944: "Illegal operation and instruction traps" Implementation

Hi Sachin,

Thanks for reaching out over E2E.

As of now, I don't see any example code that covers this type of safety implementation.

Please allow me some time to check internally and get back to you by end of this week or early next week.

Thanks and Regards,
Anirban

Hi Sachin,

ARM processors like - R4, R5 by default goes to CPU Fault state when an undefined instruction was found. 

In AWR2944, based on where the undefined instruction was found there are two types of CPU faults - RF CPU Fault and MSS CPU Fault.

You can check Fault Type field of AWR_AE_MSS_CPUFAULT_STATUS_SB async event response for MSS case and AWR_AE_RF_CPUFAULT_SB async event response for finding out if CPU fault was occurred due to any undefined instructions.

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Thanks,
Anirban

Hello Anirban,

Thanks for the reply. And can you please share the document details of which you have attached the screenshots above?

Hello Anirban,

Can you please help me out with the details on how to enable hook for this illegal instruction?

Thanks,

Sachin

Hi Sachin,

Enabling hook in the sense? I did not exactly understand which hook you are talking about.

If an undefined instruction was used in the program, the CPU will hung up and report the CPU fault detection. In the response of CPU fault async event you can check the fault type if it is '0' or not. If zero(0), that means CPU fault was due to undefined instruction.

Thanks,
Anirban

I meant the traps which are to be enabled by software for these illegal instruction. How can we enable these traps?

Hi,

Let me check with my team on this. Once I got an update, I'll inform here.

Thanks,
Anirban

Hi Anirban, 

Is there any update here?

Hi Zane,

My team is checking internally. You can expect a reply by Thursday.

Regards,
Anirban 

Thanks, Anirban!