Hi,
the datasheet says that the 2 MSBs of the low limit register exponent value (LE) must be set to 11 and the latch enable for interrupts to be triggered on every data ready event. This works for me as expected.
But I cannot find anything in the datasheet how the content of the low limit register is interpreted after that. The 2 MSB interfere with the LE valid range, and after setting those 2 bits the content of that register does not yield the same when reading it back. I.e. the 2 MSBs are not set and setting other threshold values also seem to have some kind of interpretation and does not change the register to the value that it has been written to.
Where can I find a description or clarification on what happens after setting the 2 MSBs in LE and also how to reset it back?
Thanks!
- Thomas
