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AWRL1432: Question about MCAN interrupt number

Part Number: AWRL1432

Hi,

With mcan_external_read_write_xwrL14xx-evm, I found below interrupt number 37 is generated by syscfg for MCAN.

ti_drivers_config.h

/*
* MCAN
*/
#include <drivers/mcan.h>

/* MCAN Instance Macros */
#define CONFIG_MCAN0_BASE_ADDR (CSL_APP_MCAN_MSG_RAM_U_BASE)
#define CONFIG_MCAN0_INTR (37U)
#define CONFIG_MCAN_NUM_INSTANCES (1U)

But in TRM, I found the interrupt number for MCAN is 21/22.

Would you pls kindly advice which MCAN interrupt number is correct? As MCAN demo can work, I think it is ok, but I can't understand why it is not matched with the info in TRM.

Thanks,

Chris

  • Hey Chris,

    This is because the first 16 interrupts of the vector interrupt table are reserved for internal interrupts for system components like reset (1), NMI (2), fault handlers (3-6), SVC (11), PendSV (14), and SysTick (15). The table in the TRM starts at interrupt vector 16 instead, so that's why CONFIG_MCAN0_INTR is offset by 16 (21 + 16 = 37). This is discussed in Arm Developer documentation such as the table shown below. 

    Regards,

    Kristien

    Note: This table was taken from Arm Cortex-M3, but it is applicable for Arm Cortex-M4F. You can also find the vector table under <MMWAVE_LSDK_INSTALL_DIR>/source/kernel/nortos/dpl/m4/HwiP_armv7m_handlers_nortos.c or <MMWAVE_LSDK_INSTALL_DIR>/source/kernel/freertos/dpl/m4/HwiP_armv7m_handlers_freertos.c as the variable gHwiP_vectorTable.

  • Kristien,

    Thanks a lot for your info.

    I have another question that there are two interrupt lines for MCAN, but the syscfg only generated one interrupt for MCAN. Is there any way to use both two interrupts of MCAN?

    Thanks,

    Chris 

  • Hey Chris,

    Yes, you use both interrupts of the MCAN. You can go through the normal process used to initialize an interrupt - see below text code as an example. In this case, you can use interrupt number 38 for the second interrupt.

    Regards,

    Kristien

    mcan_intr1.txt
    // NOTE: Interrupt 1 is offset by 16 to account for internal interrupts
    #define MCAN_INTR1 38 
    
    HwiP_Params                    hwiPrms;
    static HwiP_Object       gMcanHwiObject;
    
    HwiP_Params_init(&hwiPrms);
    hwiPrms.intNum      = MCAN_INTR1; 
    hwiPrms.callback    = &MCAN_Intr1ISR; // Define your own ISR
    status              = HwiP_construct(&gMcanHwiObject, &hwiPrms);
    DebugP_assert(status == SystemP_SUCCESS);