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AWR1843AOP: AWR1843AOP - DSS_L3 Memory

Part Number: AWR1843AOP

Hi, 

I am getting a bit confused with DSS_L3 memory allocation. According to the technical reference manual (SWRU520E–May 2017–Revised May 2020), section 11.3 - DSS_L3 Memory Organization for 18xx , dictated " A maximum of 1024KB of ECC-enabled memory is available as shared DSS_L3 memory in the DSP subsystem." 

However, figure 11-3 showed that the first 4 banks dedicated to DSP (Bank 0-3, 512KB) and Bank4-5 shared between DSP and Master Arm core (256KB) and Bank 6-7 reserved for BSS. Which meant to me that I can use up to 768KB for DSS. 

Basically, I could set all 8 L3 memory banks (Bank0-7) to DSS, but I am unsure if that's safe to do so as Bank6-7 resaved to BSS. Can you please help to confirm? 

Thanks, 

QHLam