AWR2544: How frame synchronisation is achieved between multiple AWR2544s

Ray wang

Part Number: AWR2544
Other Parts Discussed in Thread: AWR2243, AWR1243

Hi experts

How is frame synchronisation achieved between multiple AWR2544s inside a satellite architecture system, and is there a reference for specific implementation details?

Is it possible to connect SYNC_IN and SYNC_OUT between the chips through the idea of hardware implementation, similar to what is shown in the figure below, but does the AWR2544 have SYNC_IN and SYNC_OUT inside the same chip?

9 months ago

0 Anirban Chand 9 months ago

TI__Expert 5170 points

Hi Carl,

Cascade system is only available with AWR1243/AWR2243 device.

Satellite architecture is different than cascade system. Cascade system/device is used mainly for front-end imaging radar.

As AWR2544 is not a cascade system, there is no master and slave concept involved. Inside this chip there is no SYNC_IN or SYNC_OUT pins available for master/slave.

Please go through the device related documents below to know more about the devices and their applications -

1) Are you ready for the emerging automotive radar satellite architecture?

2) AWR2243 Cascade AppNote (Rev. B)

3) What is Imaging Radar?

4) 4D Imaging Radar with 2xAWR2243

Regards,
Anirban