AWRL6432BOOST: DopplerDPU in mmwDemo

i would like to add my question one more.

Q2. why add 0x04 to the M0 address?

( 167 line in dopplerprochwa.c)

Hi,

Please allow us a day or so to respond.

Thanks,
Clinton

Hi, Jinhyun:

Please find some block diagram for the "Doppler Processing DPU" inside the SDK L users guide. 

file:///C:/ti/MMWAVE_L_SDK_05_04_00_01/docs/api_guide_xwrL64xx/MMWAVE_DEMO.html#autotoc_md848

The Doppler FFT is processed for two range gate every ping/pong buffer.  

The reason for +0x4 in address is to get the starting address for the second range gate. 

Best,

Zigang

Hello Zigang.

i could understand Doppler FFT processing in HWA.

however, please consider Question.2 again.

After Doing Sumabs Across virutal antennas of 2nd rage gate ,

i think M0 memory block status is like blow.

(*Doing Sum statistics)

The reason for adding 0x04 is to move only the I value of the complex number to L3 memory?

Best regards

JINHYUN JEONG

Hello Zigang.

i could understand Doppler FFT processing in HWA.

however, please consider Question.2 again.

After Doing Sumabs Across virutal antennas of 2nd rage gate ,

i think M0 memory block status is like blow.

(*Doing Sum statistics)

The reason for adding 0x04 is to move only the I value of the complex number to L3 memory?

Best regards

JINHYUN JEONG

HI, JInhyun:

From the same Doxygen documentation 

You can see the input to the Doppler FFT is saved in M0 and the two range bins are next to each other.  Each sample is complex16 which is 4 byte. 

Best,

Zigang 

Hi Zigang

Thank for sharing your opinon.

As you said , i can understand Doppler FFT 1st , 2nd process. but my question point is EDMA Out Part.

This part is Setting EDMA out parameter, my question is Why add 0x04 to the srcAddrss(M0 Memory)?

This reason is to move only the I value of the complex value to to L3 Memory ? right? 

Best regards

JINHUYN JEONG

Thank you

Have a good day