Tool/software:
Hello,
I want to know behavior when an external clock fails.
Does the AWR6843 clock switch to the internal clock(10MHz) and work?
Thanks,
Shige
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Hello,
Yes, In the event the REF CLK (external clock) is not within the permissible range (40 - 100MHz), the CPUCLK is switched to RCCLK (internal 10MHz +/- 10%) during the course of wake-up.
For additional details on the clock section, you can refer to the section 5.2 of the 6843 TRM: https://www.ti.com/lit/ug/swru520e/swru520e.pdf
Very Respectfully,
Deexith.
Hello,
Thank you for your response.
I have 2 more questions.
1. Is CCS debug possible with RC CLK?
2. I changed the following software to output Nerror_out if the result of MssDiag_bootTestStatust is not DIAG_SUCCESS.
When an external clock failed, Nerror_out was not output. Could you think of anything that might have caused it?
ti\radar_toolbox_2_00_00_06\source\ti\examples\diagnostic_monitor_ref
Hello,
We are looking into your questions. Please allow us some time to respond.
Very Respectfully,
Deexith.
Hi,
Can you please let us know what retVal is in this case? How are you sure the external clock has failed?
CCS Debug should be possible with RCCLK as the source.
Regards,
Tim
Hello,
If external clock has failed, I think ESM Group1(ANA_LIMP_MODE) becomes to error by bootloader. I removed external clock from a board.
So, I think retVal is DIAG_EDATA in this case.
But, Nerror_out wasn't output.
Could you think of anything that might have caused it?
I could not connect the board with CCS Debug(XDS110) in this case.
I want to know how to connect without external clock.
Regards,
Shige
Hi,
This will take some investigation from our side. Please allow us a few days.
Regards,
Tim
Hi,
Can you try running some of the monitoring APIs found in our ICD?
mmwave_dfp_01_02_06_03/docs/mmWave-Radar-Interface-Control.pdf
For example: AWR_MONITOR_DUAL_CLOCK_COMP_REPORT_ AE_SB If you try this API, are you able to see a failure in any of the clock pairs?
Regards,
Tim