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IWR6843: max total ADC sampling time

Pavel Bartoš
Prodigy 70 points
Part Number: IWR6843

Tool/software:

Hello,

we are encountering a limit when trying to maximize the total ADC sample time. 

Our setting:

ADC Valid Start time: 7 us
# of Chirp loops: 512
# of samples per Chirp: 256

whenever we lower the velocity resolution (to make the chirp cycle time longer), to further lengthen the ADC sample time, we hit the rule of ADC sampling having to be > 2 MegaSamples per second. Which leads us to increase either Idle time or Excess ramp time, therefore shortening the ADC sample time. The highest we have been able to get is Total ADC sampling time (per single measurement) = 64ms. Do you see a way to increase the ADC sampling over 2Msps without the need of increasing Idle time/Excess ramp time which would give us longer ADC sample time when lowering the velocity resolution? Can the 2Msps requirement be omitted? How?

All time terms are used as per this image:


Thank you,

Pavel

  • 0
    TI__Mastermind 37805 points

    Hi Pavel,

    The chirp idle time is the most important factor for determining the velocity resolution. Do you want to have a smaller velocity resolution (small bin size, higher precision)? Or larger velocity resolution (large bin size, lower precision)? It seems to me that you want to make your velocity bins larger because you say you want to increase the chirp cycle time. If that is the case, then you can increase the chirp idle time, which should have no effect on each individual chirp, keeping your total sampling time constant.

    If what you're trying to do here is increase your SNR by increasing your sampling time, I would recommend decreasing the sampling rate to the minimum 2 MSPS, and chirping as many times as you can.  

    Best,

    Nate