Tool/software:
1, It is a principal question to understand datasheet definition, in order to meet intended use and not to violate abs. max rating of SOC on TJmax 140°C: Do we have to activate measures as soon any of the SOC internal temperature sensors is reaching the 140°C in the readout independent of their intrinsic specified accuracy? Or do we have to consider the accuracy tolerances of sensors and have to start measures already at lower temperatures? ( e.g. if tolerance of sensor (4TX) is +-3K; the measure has to start already at 137°C
2, Could TI please update the Excel HardwareDesignChecklist_V1p0_AWR2944.xlsx with layout guidelines considering latest version of SOC (dogbone version)
2.1. In general
2.2. Focuspoint: GND concept: electrical, thermal aspects on PCB layout
3, Could TI please share the physical positions of biggest heat sources on the chip
4, Does TI see a chance to make optimisations close to die hot spot on PCB level, focusing to bring down chip hot spot temperatures
5, Does TI see collisions of interest for GND on PCB below/close to SOC to improve electrical performance and thermal performance ( different GND rules)
6, Could TI please give a statistic of accuracy of SOC internal temp measurement
7, What are the accuracy contributors on internal temperature sensors which sums up in +-5K or +-3K
- Production tolerances
- Temp drift
- .....
8, Is there a general valid temp drift gradient for all the temp sensors. If yes, in which range is this drift gradient?
9, Is it right understanding that all SOC temp sensors on individual die have the same accuracy tendency. Accuracy delta between the sensors.
- E.g.
- Die 1: all temp sensors accuracy to be expected in +1to +2K range
- Die 2: all temp sensors accuracy to be expected in -3K to -1K range
thank you
