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IWR1843: Question for I2C Slave operation

Part Number: IWR1843

Tool/software:

Hi,

My customer is using I2C with slave transmitter mode in their system and got below waveform. 

As you can see, each time after 8bits data were transmitted from slave, SCL was kept LOW for a while just before ACK from the master device.



Q1) According to TRM section 25.3.3 Slave Transmitter Mode, the I2C module hold the SCL pin Low when /XSMT=0.
Is this the situation described in the TRM?


Q2) The customer wants to remove or minimize the SCL=Low period.
To do so, transmit data need to be loaded to ICDXR register as fast as possible, correct? 

Thanks and regards,
Koichiro Tashiro

  • Hi

    Thanks for your query. Please allow us a couple of days to respond

    Regards

  • Hello.

    Apologies for the delay in response; I am looking into this and will provide an update by the end of the day tomorrow.

    Sincerely,

    Santosh

  • Hello Koichiro.

    Q1) According to TRM section 25.3.3 Slave Transmitter Mode, the I2C module hold the SCL pin Low when /XSMT=0.
    Is this the situation described in the TRM?

    Have you checked what the value of XSMT is during the period in which the transmission occurs?  This will help determine whether this is being caused by this or something else.

    Q2) The customer wants to remove or minimize the SCL=Low period.
    To do so, transmit data need to be loaded to ICDXR register as fast as possible, correct? 

    In general usage, the SCL line is driven by the controller(master) device; the peripheral(slave) device can just pull it low in certain circumstances, so the SCL frequency would have to be configured by the controller.  Please refer to section 25.1.3 on how this is generated.  If you are specifically asking about the extended SCL low period, you could try loading as quickly as possible but if it is due to a delay in the controller sending the ACK then something should be done on the controller side to handle that.

    Sincerely,

    Santosh