Tool/software:
Dear Sirs,
Recently,our engineers encountered an issue while designing actuator using the TMAG5173-Q1.
During I2C measurements, it was observed that the SCL frequency generated by the FPGA was 340KHz and could not be adjusted to 400KHz.
Additionally, the data hold time exceeded the specified 900 ns. Could you please explain what kind of impact this might have on the TMAG5173-Q1?
Please contact me via the following email.
Thanks,