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FDC2214EVM: Sampling rate

Part Number: FDC2214EVM
Other Parts Discussed in Thread: FDC2214

Tool/software:

The FDC2214 capacitance-to-digital converter is specified to reach a maximum output rate of 4.08 kSPS. However, my measurements using the evaluation module show a 2.5 ms/sample (400 SPS) readout time. The Sensing Solutions GUI is configured to the EVM output rate so that it does not limit the data collection speed. Also, changing the settle count seems to have little effect.

If I understand correctly, 40 MHz is the maximum external oscillator frequency. The GUI itself indicates a 26.625 ms Total Device Sampling Time at this clock frequency during single channel measurement. Therefore, I am quite confused about how the 4.08 kSPS output rate can be achieved. I would very much appreciate any advice!

  • Maryam,

    From the way the spec is written, it looks lie the 4.08kSPS rate is a combination of the sensor settings and the data transfer over the I2C interface.
    I will look into this in more detail and update this thread before the end of the week.

    Regards.
    John

  • Maryam,

    I believe the maximum channel sample rate spec (=4.080kSPS) refers to the ability of the I2C (w/SCL = 400kHz) to support the output data from the FDC.
    This is important because it is possible to choose an FDC conversion rate that is too high for the I2C interface, leading to incomplete conversions and poor output data.

    Regards,
    John

  • Hi John,

    Thank you for your response. I see in Table 6.5 of the datasheet that the maximum channel sample rate at SCL = 400 kHz can reach 4.08 kSPS. 

    However, I am still a bit confused about the true maximum sample rate of the device — one that does not lead to incomplete conversions and poor output data. I would very much appreciate any insight into this!

    Perhaps some details about the precise test setup used in the datasheet would also help, i.e. how the 4.08 kSPS was achieved.

    Best regards,
    Maryam

  • Maryam,

    Apologies for the delayed reply.

    I tried some rough calculations using the I2C frame structure shown in Figure 17 with a 400kHz clock and came up with a max single channel continuous sample rate of ~6kHz, so more details will be needed to justify the quoted 4.08kHz rate.

    This is a relatively old device, so digging into the details behind this data sheet spec will take a bit of time.

    I will dig into this and update this thread by COB Wednesday.

    Regards,
    John

  • Maryam,

    Some more detailed info from just before the device released confirms the 4.08kHz spec refers to the I2C data throughput for a single active channel with a 400kHz SCL.

    Please let me know if you have any more questions.

    Regards,
    John

  • Hi John,

    Thank you for getting back to me. Could I then confirm that the EVM limits the readout rate to 400 SPS? And that the 4.08 kSPS can instead by achieved via an alternative interface? If that is the case, it would be helpful to understand why this limitation is imposed on the EVM.

    Best regards,
    Maryam

  • Maryam,

    I'm not sure I understand your question. 
    What are the considerations for the 400SPS?
    What alternate interface do you have in mind? 
    I'm asking because there may be some system-level assumptions behind the questions, and we don't want to assume or overlook anything.

    You might have seen it already, but if not, please take a look at the example calculations for initial register values on page 42 of the data sheet.
    This may help with the limits of what the devcei can do.

    You can also use our Inductive Sensing Design Calculator Tool for our FDC2x1y devices via the LDC131x-LDC161x_Config tab to calculate device settings, input and output parameters for the scenario of interest.
    The FDC2x1y devices have a very similar internal architecture to our LDC131x and LDC161x devices, so for the purposes of using the design tool, consider that FDC211x = LDC131x and FDC221x = LDC161x.
    The major difference is that LDCs use a coil sensor, and FDCs use a capacitive sensor. 

    Regards,
    John

  • Hi John,

    Many thanks for your response.

    To clarify, the 400 SPS was obtained from the measurements using an FDC2214 evaluation module. Since the GUI was configured to the EVM output rate, it seems to be the maximum output rate. By alternative interface, I meant to bypass the processor and GUI associated with the EVM (e.g., using an MCU or FPGA to communicate with the IC directly). I would like to understand if this could be the solution to maximising the sampling rate beyond 400 SPS.

    The recommended initial register configuration values reported in 8.2.3.1 on page 43 of the datasheet assume an example sampling rate of 100 SPS (hence the 10 ms Tsample), which is far below the rated maximum speed (4.08 kSPS) or the measured speed (400 SPS). Could you please clarify what is the true maximum output rate of the device (if not 4.08 kSPS)?

    Best regards,
    Maryam

  • Maryam,

    The maximum output rate is as published, but its usefulness is dependent on the underlying device settings.
    Not all device configurations will support this max rate. 

    For example, if the max RCOUNT is used for four active channels, along with a short Tsample, you will most likely start seeing overwrites of the output data. 

    Our data sheet doesn't offer the guidance that it should for this topic.

    I will look at this in more detail and try to provide some guidance by Wednesday of next week.

    regards,
    John

  • Maryam,

    I did some back-of-the-envelope calculations based on the equations on page 17 of the data sheet and section 10.2.3.2 (Recc. Initial Register Config Values).

    The goal was to see what device settings would result in an output data rate that is close to the maximum channel sample rate of 4.08KSPS for the I2C interface.

    To get started, assume this is a single-channel (CH0) application and that the combination of data bits (DATA_CHx) divided by the channel's sampling time (TSAMPLE) equals the maximum channel sampling rate spec of 4.08KSPS.

    Also assume the sensor activation and switching time are negligible: so TSAMPLE = conversion time = tCx

    (#DATA_CHx bits)/(conversion time) = Max channel sampling rate → NB/tCx = fCS

    Solving for the CHx_RCOUNT that will give an output data rate equivalent to the max sampling rate (fCS):

    tCx = (16·CHx_RCOUNT + 4)/fREFx = NB/fCS   and rearranging →   CHx_RCOUNT = (NB·fREFx/fCS - 4)/16

    CHx_RCOUNT = (28bits·35MHz/4.08kSPS - 4)/16 = 15012 = 0x3AA4

    I entered this value into the GUI (other settings stayed at default values) and it didn't give any objections or flag any errors.

    Caveat: The data sheet says fREF < 35MHz for single-channel operation.
    The GUI shows A 40MHz oscillator frequency, so I'm not sure if this will result in errors, or if related errors will result in warning messages.

    I hope this helps. Pleas let me know if you have any questions.

    Regards,
    John