Tool/software:
Hi TI,
How to reduce the power consumption by clock gating during the idle time between frames?
In 3D_people_count_68xx_demo, can show me which part of the source code should be looked into for changes?
For DSS Clock Gating, code changes to be done in DSS code?
For MSS VCLK Gating, code changes to be done in MSS code?

Reference: 适用于IWR6843系列毫米波雷达SOC的软件功耗优化示例
Regards.
Thiam Chi
 
				 
		 
					 
                          