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AWR1843AOP: LAYOUT GUIDE REQUIRED FOR AWR1843AOP RADAR SENSOR

Part Number: AWR1843AOP

Tool/software:

Hi all,

I am making layout using AWR1843AOP using the same PMIC IC which is on development kit .

But my question is do i need to give space around the AWR IC FOR Isolation or i can place component near to this ic , will it antenna will work fine 

Please let me know as per development kit i don't know why the top and bottom side of radar IC left blank.

  • Hello,

    I recommend copying the layout from our EVM. If you have tall components in the antenna FOV it can impact the performance. We kept the area on the EVM empty for this reason.

    AWR1843AOPEVM Evaluation board | TI.com

    Also, please refer to page 49 of the errata.

    https://www.ti.com/lit/er/swrz115b/swrz115b.pdf 

    Regards,

    Adrian

  • Hi,

    Thanks for reply 

    But in the errata document it tells to keep the pcb edge minimum or a cut but in the evm board both things is not followed 

  • Also i have one more question that why is 2 Oz of cooper layer is used can I use 1 Oz of layer for manufacturing feasibility and cost for at least signal layers .

  • Hello,

    Yes, we tested the EVM and saw that we can still achieve good performance with the PCB extended slightly further in the e-plane, so we are not exactly following the errata recommendations. That is why I am recommending to just copy our design, since we have already validated that the performance is good. 

    I would not recommend reducing the copper thickness. This will give worse thermal performance and increase IR drops on the PCB power supplies.

    Regards,

    Adrian

  • Hi ,

    I have difficulty for manufacturing  of 6mil trace width  as per in refence design as all our supplier support 8 mil trace width , 6 mil is possible but very expensive for 2 oz copper layer .

    Also could you tell me for which tracks i need to maintain impedance and length like for spi , lvds or other .

  • Hello,

    You can refer to the attached design checklist for impedance/length matching requirements.

    HardwareDesignChecklist_V0p1_xWR1843AoP.xlsx

    If you want to use thinner copper you need to validate that you can meet the thermal and power supply requirements. We cannot do this analysis; it is your responsibility to validate this for your design.

    Regards,

    Adrian

  • Hi ,

    Thanks for reply .

    i have one problem with pcb edge layout recommendations it says it should be <240 mils else place cut out but both are not possible in my case .

    mine is 450 mm from ic edge to pcb edge , how much impact will I get in radar performance .

    but in that plane on bottom side of pcb where awr is placed I  didn't placed any component , copper etc. in azimuth plane .

  • Hello,

    We cannot answer that question since we did not analyze with 450mm. 

    The only way to know is to do the simulation in HFSS with your PCB. For this you would need the HFSS model for the AWR1843AoP. This needs to be provided over NDA only, so to obtain this you need to reach out to your local TI field sales representative who can help you apply for NDA.

    Regards,

    Adrian

  • HI,

    Can u please explain more about HFSS model and how it can help me to determine performance of my custom pcb .

    Thanks,

    Ravi Yadav

  • Can i provide my pcb data and get simulated data as i don't have ANSYS also i don't know how to use it .

  • Hello,

    There are many resources on the web available to help. We cannot teach you how to use HFSS since it is not a TI product. 

    We can provide you the HFSS model through NDA (you need to reach out to your local field sales office for this, we will not give you this over E2E). Once you have the model, you will need to reach out to ANSYS or read/watch some tutorials to learn how to do the simulations. It is not a trivial task and requires a lot of in-depth knowledge on EM, so you should expect to spend some time on learning how to do this.

    Regards,

    Adrian