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AWR1843AOP: Guide to AOP peripheral placement

Do-hyun Kim
Intellectual 305 points
Part Number: AWR1843AOP

Tool/software:

I would like to ask if there is a separate guide for the placement of components around the AOP.

If you have a separate data sheet or design guide, you can provide it.

For example, the guide is about prohibiting the placement of components within a few mm around the AOP or limiting the height.

  • 0
    TI__Expert 6790 points

    Hi,

    Do you have access to the EVM design files? 

    regards,

    Ali 

  • 0 in reply to Ali Syed
    Intellectual 305 points

    I am designing with AWR1843AOP in a PCB space of approximately 70mm x 20mm. Are there any components (inductors, capacitors) that should not be placed around the AOP? I am wondering if there are any absolute standards for the spacing or height of components. Of course, it is obvious that tall components or components that affect EMI should not be placed around the AOP, but since the PCB space is narrow, a technical trade-off is necessary. Therefore, a PCB design guide that TI absolutely recommends is needed.

  • 0 in reply to Do-hyun Kim
    TI__Mastermind 30545 points

    Hello,

    We provide the design files on the product page:

    AWR1843AOPEVM Evaluation board | TI.com

    There is a reference section which we recommend copying for the smallest form factor. This section contains all of the necessary components for operation of the device in functional/flashing modes.

    As mentioned in errata PACKAGE#02A you should not place any components in the e-plane area.

    AWR1843AOP Device Errata, Silicon Revision 1.0 (Rev. B)

    Regards,

    Adrian

  • 0 in reply to aozer
    Intellectual 305 points

    The data only covers PCB space, and does not seem to be a guide for the placement of components around the AOP.
    I checked the AOP data of other companies and found that there is an influence depending on the height and distance of the peripheral components. I would like to ask TI to check further to see if there are any absolute recommendations on this matter.

  • 0 in reply to Do-hyun Kim
    TI__Mastermind 30545 points

    Hello,

    The absolute recommendation is that there should not be any components placed in the e-plane region other than the XTAL. Any components placed in this region can cause surface wave artifacts. We have designed the EVM to meet this requirement and verified the performance. 

    If you want to know the exact impact of something which deviates from the EVM you need to simulate the design in HFSS. Any deviation from the EVM design can cause a performance impact.

    Regards,

    Adrian

  • 0 in reply to aozer
    Intellectual 305 points

    When you say components placed in the E-PLANE area, are you talking about within 0.3mm?
    There are no components placed in the E-PLANE area. There is a 1.5mm high MLCC placed near the AOP 4mm and a 1mm high MLCC placed near the AOP 2mm. Will these be a problem?

    Also, in the EVM, the antenna placement shape of the AOP is in the form of a T-shape lying 90 degrees counterclockwise. Should the influence of the antenna placement shape also be considered?

  • 0 in reply to Do-hyun Kim
    TI__Mastermind 30545 points

    Hello,

    E-plane is the area indicated in red below.

    We have validated the EVM with the XTAL and small caps in this region and the performance was fine. However, if you start adding more components or increase the board size in this region you may see surface wave artifacts having an impact on the antenna pattern.

    We cannot give you quantifiable number for how much it would be impacted if you add more components in this region. The only way to determine this is through simulation in HFSS or to build a board a measure it.

    Regards,

    Adrian