AWR1843AOP: AWR1843AOP Inquiry regarding Chip Select (general GPIO) settings when controlling multiple SLAVEs

Hi, 

If I understand correctly, you are looking to interface more devices with the AWR1843AOP over SPI protocol. Please let me know if my understanding is not correct.

Additionally, you may note that there are 3 chip-select options available for SPIB as per page 24 of the datasheet: https://www.ti.com/lit/ds/symlink/awr1843aop.pdf

Further, it will help us to answer to your query better if we can understand your use-case for the device.

Regards.

Shailesh

I referred to page 24 of the DATASHEET you guided me through. I am currently not using the SPIA channel. I am only using the SPIB channel.

If I add a SLAVE in the SPIB channel, should I select one of the following?

SPIB CS1(D3,J2),

SPIB CS2(B2,L3,M3),

SPIB CS3(G2,L3,M3)

Can't I assign it as a general GPIO?

So, can't the SPIB channel only use up to 3 SLAVEs?

Yes, if you need to have more than 3 SPI secondary (slave) devices then you can use GPIO to assign more chip-selects to those devices. However, this hasn't been tested as part of common use-cases, so you will need to modify the SPI control logic and try it out. 

Regards,

Shailesh

Thank you for your answer. Then, when controlling 3 SLAVEs with SPIB channel, if I assign the chip select pins as follows, will there be no problem? SPIB CS1(D3,), SPIB CS2(B2), SPIB CS3(L3)