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AWR1843AOPEVM: Decoupling capacitor of AOP POWER

DongHyun Lee
Prodigy 110 points
Part Number: AWR1843AOPEVM
Other Parts Discussed in Thread: AWR1843AOP, AWR1843

Tool/software:

Hello,

I would like to inquire about the decoupling capacitors used in the AOP POWER section of the AWR1843AOP EVM. As shown in the diagram below, the decoupling capacitors used in the EVM’s AOP POWER appear to be configured based on the maximum power consumption of the AWR1843AOP device (as per the datasheet: 1.2V/1A, 1.3V/2A or 1V/2.5A, 1.8V/850mA, 3.3V/50mA, maximum power = 5.4W).

In our application, the actual power consumption of the AWR1843AOP is about half of the maximum—approximately 2.7W (1–1.4W from the 1V rail, and 1.3–1.7W from the other three power rails). Given this, we believe it may be possible to reduce the number or value of the decoupling capacitors used in our design compared to the EVM.

Could TI provide guidance on how much we can reduce the decoupling capacitance in this case?
Alternatively, could you review and confirm whether the decoupling capacitor configuration in our current AOP POWER design is acceptable based on our application’s power consumption?

We would appreciate your advice on this matter.
Thank you very much.

  • 0
    TI__Expert 5461 points

    Hello,

    Could you please confirm what is the end application? ADAS or in cabin. 

    Regards,

    Aydin 

  • 0 in reply to Aydin Kiasat
    Prodigy 110 points

    It is used as a short-range obstacle collision avoidance radar within 5 meters.
    Also, we use the radar only in TDM (Time Division Multiplexing) mode.

  • 0 in reply to Aydin Kiasat
    Prodigy 110 points

    It is used as a short-range obstacle collision avoidance radar within 5 meters.
    Also, we use the radar only in TDM (Time Division Multiplexing) mode.

    The attached diagram shows our current decoupling capacitor configuration for the AOP power.
    We would appreciate your confirmation on this configuration.
    If there are any components that need to be added or modified for proper operation, please let us know.
    Thank you.

  • 0 in reply to DongHyun Lee
    TI__Expert 5461 points

    Hi DongHyun, 

    Thanks for confirming the end application. 

    We recommend keeping the capacitor configuration as it is on the EVM board since that is how our internal validation is based on. If you're considering reducing capacitors, I'd suggest measuring the supply rails to ensure transient and settling time still meet spec. From a quick look it seems you may have reduced the smaller caps. We generally recommend keeping these caps near the device pins to help attenuate any high frequency noise. 

    Regards,

    Aydin 

  • 0 in reply to Aydin Kiasat
    Prodigy 110 points

    Hello,

    Currently, due to a request from our customer (an automotive OEM), we are required to obtain official confirmation from TI regarding the decoupling capacitor configuration used in our production model.

    Our application, including the designed circuit and PCB, has so far passed all application tests and qualification requirements without any issues. However, in order to receive confirmation from TI, we would appreciate your guidance on what aspects need to be improved or supplemented in the decoupling capacitor configuration shown in the attached photo.

    Please let us know the minimum changes or additions required to meet TI’s validation criteria for confirmation.

    We would greatly appreciate your feedback.

    Thank you.

  • 0 in reply to DongHyun Lee
    TI__Expert 5461 points

    Hello,

    Thanks for the clarification. Just to reiterate, TI can only provide official confirmation for configurations that match what we’ve validated internally. This includes the decoupling capacitor configuration used on the EVM and the guidance provided in the Hardware Design Checklist.

    If you or the OEM decide to modify the component values such as reducing or removing capacitors the evaluation and validation responsibility would fall entirely on your side. TI cannot provide formal confirmation or guarantee performance for configurations that deviate from our validated design.
    We’re happy to provide technical input on your changes, but for official alignment especially for automotive applications we strongly recommend following the EVM and design guideline references.

    Regards,

    Aydin

  • 0 in reply to Aydin Kiasat
    Prodigy 110 points

    Thank you for your response.
    I have a few additional questions and would like to follow up.

    Question 1:
    The AWR1843 (Non-AOP version) and the AWR1843AOP have identical functionalities, supply voltages, and maximum load currents per voltage rail. However, I noticed that the decoupling capacitor configurations for the AOP POWER rail are different between the two EVMs. Could you please explain why this difference exists? Was it simply due to different validation setups during EVM development?

    Question 2:
    If both configurations have been validated by TI, would it be acceptable to use the decoupling capacitor configuration from the AWR1843 (Non-AOP version) for the AWR1843AOP?

    I would appreciate your clarification on this matter.
    Thank you very much.

  • 0 in reply to DongHyun Lee
    TI__Expert 5461 points

    Hi DongHyun,

    Between AOP and ETS, the devices are not pin compatible. The AOP has more supply pins, which justifies having the additional de-caps on the AOP board. 

    Additionally, since these are two different packages implemented on two different boards with two different stack ups and material used, TI has validated each configuration independently. While both are valid, we recommend following the design guidelines and the EVM design. If you plan to make any changes, that should be validated on your end to ensure proper performance.

    Regards,

    Aydin 

  • 0 in reply to Aydin Kiasat
    Prodigy 110 points

    Dear Aydin,

    Thank you for your response. I have a few additional questions and would appreciate your support.

    Question 1:
    Due to PCB space constraints, we are only able to implement the IC POWER decoupling capacitor configuration as specified in the AWR1843 Hardware Design Checklist. Could you please confirm whether this configuration alone is sufficient?

    Question 2:
    If the configuration in Question 1 is not sufficient, we are planning to perform transient response and settle time tests on the power rails supplied to the IC.
    Could you kindly provide the recommended test conditions and the criteria that need to be met (e.g., voltage tolerance, allowable settle time, etc.)?

    For your reference, our application operates within an input voltage range of 9V to 16V, with a nominal voltage of 12V. The maximum current consumption is approximately 300 mA at 12V.

    Looking forward to your guidance.

    Best regards,
    DongHyun

  • 0 in reply to DongHyun Lee
    TI__Expert 5461 points

    Hi DongHyun,

    We recommend following the full hardware design checklist and reference design as closely as possible. On voltage tolerance, ensure all rails stay within the limits defined in the datasheet during transients. On settling time, supplies should ideally settle within ~10uS/before ADC sampling begins. For the ripple, please refer to Table 6-2. Ripple Specifications in the datasheet. AWR1843AOP Single-chip 77- and 79-GHz FMCW mmWave Sensor Antennas-On-Package (AOP) datasheet (Rev. C)

    Regards,

    Aydin